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<title>Debugging with GDB: ARC Features</title>

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<a name="ARC-Features"></a>
<div class="header">
<p>
Next: <a href="ARM-Features.html#ARM-Features" accesskey="n" rel="next">ARM Features</a>, Previous: <a href="AArch64-Features.html#AArch64-Features" accesskey="p" rel="previous">AArch64 Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="ARC-Features-1"></a>
<h4 class="subsection">G.5.2 ARC Features</h4>
<a name="index-target-descriptions_002c-ARC-Features"></a>

<p>ARC processors are so configurable that even core registers and their numbers
are not predetermined completely.  Moreover, <em>flags</em> and <em>PC</em>
registers, which are important to <small>GDB</small>, are not &ldquo;core&rdquo; registers in
ARC.  Therefore, there are two features that their presence is mandatory:
&lsquo;<samp>org.gnu.gdb.arc.core</samp>&rsquo; and &lsquo;<samp>org.gnu.gdb.arc.aux</samp>&rsquo;.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.arc.core</samp>&rsquo; feature is required for all targets.  It must
contain registers:
</p>
<ul class="no-bullet">
<li>- &lsquo;<samp>r0</samp>&rsquo; through &lsquo;<samp>r25</samp>&rsquo; for normal register file targets.
</li><li>- &lsquo;<samp>r0</samp>&rsquo; through &lsquo;<samp>r3</samp>&rsquo;, and &lsquo;<samp>r10</samp>&rsquo; through &lsquo;<samp>r15</samp>&rsquo; for reduced
register file targets.
</li><li>- &lsquo;<samp>gp</samp>&rsquo;, &lsquo;<samp>fp</samp>&rsquo;, &lsquo;<samp>sp</samp>&rsquo;, &lsquo;<samp>r30</samp>&rsquo;<a name="DOCF21" href="#FOOT21"><sup>21</sup></a>,
&lsquo;<samp>blink</samp>&rsquo;, &lsquo;<samp>lp_count</samp>&rsquo;, &lsquo;<samp>pcl</samp>&rsquo;.
</li></ul>

<p>In case of an ARCompact target (ARCv1 ISA), the &lsquo;<samp>org.gnu.gdb.arc.core</samp>&rsquo;
feature may contain registers &lsquo;<samp>ilink1</samp>&rsquo; and &lsquo;<samp>ilink2</samp>&rsquo;.  While in case
of ARC EM and ARC HS targets (ARCv2 ISA), register &lsquo;<samp>ilink</samp>&rsquo; may be present.
The difference between ARCv1 and ARCv2 is the naming of registers <em>29th</em>
and <em>30th</em>.  They are called &lsquo;<samp>ilink1</samp>&rsquo; and &lsquo;<samp>ilink2</samp>&rsquo; for ARCv1 and
are optional.  For ARCv2, they are called &lsquo;<samp>ilink</samp>&rsquo; and &lsquo;<samp>r30</samp>&rsquo; and only
&lsquo;<samp>ilink</samp>&rsquo; is optional.  The optionality of &lsquo;<samp>ilink*</samp>&rsquo; registers is
because of their inaccessibility during user space debugging sessions.
</p>
<p>Extension core registers &lsquo;<samp>r32</samp>&rsquo; through &lsquo;<samp>r59</samp>&rsquo; are optional and their
existence depends on the configuration.  When debugging GNU/Linux applications,
i.e. user space debugging, these core registers are not available.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.arc.aux</samp>&rsquo; feature is required for all ARC targets.  Here
is the list of registers pertinent to this feature:
</p>
<ul class="no-bullet">
<li>- mandatory: &lsquo;<samp>pc</samp>&rsquo; and &lsquo;<samp>status32</samp>&rsquo;.
</li><li>- optional: &lsquo;<samp>lp_start</samp>&rsquo;, &lsquo;<samp>lp_end</samp>&rsquo;, and &lsquo;<samp>bta</samp>&rsquo;.
</li></ul>

<div class="footnote">
<hr>
<h4 class="footnotes-heading">Footnotes</h4>

<h3><a name="FOOT21" href="#DOCF21">(21)</a></h3>
<p>Not necessary for ARCv1.</p>
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