BPF-Opcodes.html 13 KB

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  57. <a name="BPF-Opcodes"></a>
  58. <div class="header">
  59. <p>
  60. Previous: <a href="BPF-Directives.html#BPF-Directives" accesskey="p" rel="previous">BPF Directives</a>, Up: <a href="BPF_002dDependent.html#BPF_002dDependent" accesskey="u" rel="up">BPF-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  61. </div>
  62. <hr>
  63. <a name="Opcodes-5"></a>
  64. <h4 class="subsection">9.7.4 Opcodes</h4>
  65. <a name="index-BPF-opcodes"></a>
  66. <a name="index-opcodes-for-BPF"></a>
  67. <p>In the instruction descriptions below the following field descriptors
  68. are used:
  69. </p>
  70. <dl compact="compact">
  71. <dt><code>%d</code></dt>
  72. <dd><p>Destination general-purpose register whose role is to be destination
  73. of an operation.
  74. </p></dd>
  75. <dt><code>%s</code></dt>
  76. <dd><p>Source general-purpose register whose role is to be the source of an
  77. operation.
  78. </p></dd>
  79. <dt><code>disp16</code></dt>
  80. <dd><p>16-bit signed PC-relative offset, measured in number of 64-bit words,
  81. minus one.
  82. </p></dd>
  83. <dt><code>disp32</code></dt>
  84. <dd><p>32-bit signed PC-relative offset, measured in number of 64-bit words,
  85. minus one.
  86. </p></dd>
  87. <dt><code>offset16</code></dt>
  88. <dd><p>Signed 16-bit immediate.
  89. </p></dd>
  90. <dt><code>imm32</code></dt>
  91. <dd><p>Signed 32-bit immediate.
  92. </p></dd>
  93. <dt><code>imm64</code></dt>
  94. <dd><p>Signed 64-bit immediate.
  95. </p></dd>
  96. </dl>
  97. <a name="Arithmetic-instructions"></a>
  98. <h4 class="subsubsection">9.7.4.1 Arithmetic instructions</h4>
  99. <p>The destination register in these instructions act like an
  100. accumulator.
  101. </p>
  102. <dl compact="compact">
  103. <dt><code>add %d, (%s|imm32)</code></dt>
  104. <dd><p>64-bit arithmetic addition.
  105. </p></dd>
  106. <dt><code>sub %d, (%s|imm32)</code></dt>
  107. <dd><p>64-bit arithmetic subtraction.
  108. </p></dd>
  109. <dt><code>mul %d, (%s|imm32)</code></dt>
  110. <dd><p>64-bit arithmetic multiplication.
  111. </p></dd>
  112. <dt><code>div %d, (%s|imm32)</code></dt>
  113. <dd><p>64-bit arithmetic integer division.
  114. </p></dd>
  115. <dt><code>mod %d, (%s|imm32)</code></dt>
  116. <dd><p>64-bit integer remainder.
  117. </p></dd>
  118. <dt><code>and %d, (%s|imm32)</code></dt>
  119. <dd><p>64-bit bit-wise &ldquo;and&rdquo; operation.
  120. </p></dd>
  121. <dt><code>or %d, (%s|imm32)</code></dt>
  122. <dd><p>64-bit bit-wise &ldquo;or&rdquo; operation.
  123. </p></dd>
  124. <dt><code>xor %d, (%s|imm32)</code></dt>
  125. <dd><p>64-bit bit-wise exclusive-or operation.
  126. </p></dd>
  127. <dt><code>lsh %d, (%s|imm32)</code></dt>
  128. <dd><p>64-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
  129. </p></dd>
  130. <dt><code>rsh %d, (%s|imm32)</code></dt>
  131. <dd><p>64-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
  132. </p></dd>
  133. <dt><code>arsh %d, (%s|imm32)</code></dt>
  134. <dd><p>64-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
  135. </p></dd>
  136. <dt><code>neg %d</code></dt>
  137. <dd><p>64-bit arithmetic negation.
  138. </p></dd>
  139. <dt><code>mov %d, (%s|imm32)</code></dt>
  140. <dd><p>Move the 64-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
  141. in <code>%d</code>.
  142. </p></dd>
  143. </dl>
  144. <a name="g_t32_002dbit-arithmetic-instructions"></a>
  145. <h4 class="subsubsection">9.7.4.2 32-bit arithmetic instructions</h4>
  146. <p>The destination register in these instructions act as an accumulator.
  147. </p>
  148. <dl compact="compact">
  149. <dt><code>add32 %d, (%s|imm32)</code></dt>
  150. <dd><p>32-bit arithmetic addition.
  151. </p></dd>
  152. <dt><code>sub32 %d, (%s|imm32)</code></dt>
  153. <dd><p>32-bit arithmetic subtraction.
  154. </p></dd>
  155. <dt><code>mul32 %d, (%s|imm32)</code></dt>
  156. <dd><p>32-bit arithmetic multiplication.
  157. </p></dd>
  158. <dt><code>div32 %d, (%s|imm32)</code></dt>
  159. <dd><p>32-bit arithmetic integer division.
  160. </p></dd>
  161. <dt><code>mod32 %d, (%s|imm32)</code></dt>
  162. <dd><p>32-bit integer remainder.
  163. </p></dd>
  164. <dt><code>and32 %d, (%s|imm32)</code></dt>
  165. <dd><p>32-bit bit-wise &ldquo;and&rdquo; operation.
  166. </p></dd>
  167. <dt><code>or32 %d, (%s|imm32)</code></dt>
  168. <dd><p>32-bit bit-wise &ldquo;or&rdquo; operation.
  169. </p></dd>
  170. <dt><code>xor32 %d, (%s|imm32)</code></dt>
  171. <dd><p>32-bit bit-wise exclusive-or operation.
  172. </p></dd>
  173. <dt><code>lsh32 %d, (%s|imm32)</code></dt>
  174. <dd><p>32-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
  175. </p></dd>
  176. <dt><code>rsh32 %d, (%s|imm32)</code></dt>
  177. <dd><p>32-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
  178. </p></dd>
  179. <dt><code>arsh32 %d, (%s|imm32)</code></dt>
  180. <dd><p>32-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
  181. </p></dd>
  182. <dt><code>neg32 %d</code></dt>
  183. <dd><p>32-bit arithmetic negation.
  184. </p></dd>
  185. <dt><code>mov32 %d, (%s|imm32)</code></dt>
  186. <dd><p>Move the 32-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
  187. in <code>%d</code>.
  188. </p></dd>
  189. </dl>
  190. <a name="Endianness-conversion-instructions"></a>
  191. <h4 class="subsubsection">9.7.4.3 Endianness conversion instructions</h4>
  192. <dl compact="compact">
  193. <dt><code>endle %d, (8|16|32)</code></dt>
  194. <dd><p>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to
  195. little-endian.
  196. </p></dd>
  197. <dt><code>endbe %d, (8|16|32)</code></dt>
  198. <dd><p>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to big-endian.
  199. </p></dd>
  200. </dl>
  201. <a name="g_t64_002dbit-load-and-pseudo-maps"></a>
  202. <h4 class="subsubsection">9.7.4.4 64-bit load and pseudo maps</h4>
  203. <dl compact="compact">
  204. <dt><code>lddw %d, imm64</code></dt>
  205. <dd><p>Load the given signed 64-bit immediate, or pseudo map descriptor, to
  206. the destination register <code>%d</code>.
  207. </p></dd>
  208. <dt><code>lddw %d, %map_fd(N)</code></dt>
  209. <dd><p>Load the address of the given pseudo map fd <em>N</em> to the
  210. destination register <code>%d</code>.
  211. </p></dd>
  212. </dl>
  213. <a name="Load-instructions-for-socket-filters"></a>
  214. <h4 class="subsubsection">9.7.4.5 Load instructions for socket filters</h4>
  215. <p>The following instructions are intended to be used in socket filters,
  216. and are therefore not general-purpose: they make assumptions on the
  217. contents of several registers. See the file
  218. <samp>Documentation/networking/filter.txt</samp> in the Linux kernel source
  219. tree for more information.
  220. </p>
  221. <p>Absolute loads:
  222. </p>
  223. <dl compact="compact">
  224. <dt><code>ldabsdw imm32</code></dt>
  225. <dd><p>Absolute 64-bit load.
  226. </p></dd>
  227. <dt><code>ldabsw imm32</code></dt>
  228. <dd><p>Absolute 32-bit load.
  229. </p></dd>
  230. <dt><code>ldabsh imm32</code></dt>
  231. <dd><p>Absolute 16-bit load.
  232. </p></dd>
  233. <dt><code>ldabsb imm32</code></dt>
  234. <dd><p>Absolute 8-bit load.
  235. </p></dd>
  236. </dl>
  237. <p>Indirect loads:
  238. </p>
  239. <dl compact="compact">
  240. <dt><code>ldinddw %s, imm32</code></dt>
  241. <dd><p>Indirect 64-bit load.
  242. </p></dd>
  243. <dt><code>ldindw %s, imm32</code></dt>
  244. <dd><p>Indirect 32-bit load.
  245. </p></dd>
  246. <dt><code>ldindh %s, imm32</code></dt>
  247. <dd><p>Indirect 16-bit load.
  248. </p></dd>
  249. <dt><code>ldindb %s, imm32</code></dt>
  250. <dd><p>Indirect 8-bit load.
  251. </p></dd>
  252. </dl>
  253. <a name="Generic-load_002fstore-instructions"></a>
  254. <h4 class="subsubsection">9.7.4.6 Generic load/store instructions</h4>
  255. <p>General-purpose load and store instructions are provided for several
  256. word sizes.
  257. </p>
  258. <p>Load to register instructions:
  259. </p>
  260. <dl compact="compact">
  261. <dt><code>ldxdw %d, [%s+offset16]</code></dt>
  262. <dd><p>Generic 64-bit load.
  263. </p></dd>
  264. <dt><code>ldxw %d, [%s+offset16]</code></dt>
  265. <dd><p>Generic 32-bit load.
  266. </p></dd>
  267. <dt><code>ldxh %d, [%s+offset16]</code></dt>
  268. <dd><p>Generic 16-bit load.
  269. </p></dd>
  270. <dt><code>ldxb %d, [%s+offset16]</code></dt>
  271. <dd><p>Generic 8-bit load.
  272. </p></dd>
  273. </dl>
  274. <p>Store from register instructions:
  275. </p>
  276. <dl compact="compact">
  277. <dt><code>stxdw [%d+offset16], %s</code></dt>
  278. <dd><p>Generic 64-bit store.
  279. </p></dd>
  280. <dt><code>stxw [%d+offset16], %s</code></dt>
  281. <dd><p>Generic 32-bit store.
  282. </p></dd>
  283. <dt><code>stxh [%d+offset16], %s</code></dt>
  284. <dd><p>Generic 16-bit store.
  285. </p></dd>
  286. <dt><code>stxb [%d+offset16], %s</code></dt>
  287. <dd><p>Generic 8-bit store.
  288. </p></dd>
  289. </dl>
  290. <p>Store from immediates instructions:
  291. </p>
  292. <dl compact="compact">
  293. <dt><code>stddw [%d+offset16], imm32</code></dt>
  294. <dd><p>Store immediate as 64-bit.
  295. </p></dd>
  296. <dt><code>stdw [%d+offset16], imm32</code></dt>
  297. <dd><p>Store immediate as 32-bit.
  298. </p></dd>
  299. <dt><code>stdh [%d+offset16], imm32</code></dt>
  300. <dd><p>Store immediate as 16-bit.
  301. </p></dd>
  302. <dt><code>stdb [%d+offset16], imm32</code></dt>
  303. <dd><p>Store immediate as 8-bit.
  304. </p></dd>
  305. </dl>
  306. <a name="Jump-instructions"></a>
  307. <h4 class="subsubsection">9.7.4.7 Jump instructions</h4>
  308. <p>eBPF provides the following compare-and-jump instructions, which
  309. compare the values of the two given registers, or the values of a
  310. register and an immediate, and perform a branch in case the comparison
  311. holds true.
  312. </p>
  313. <dl compact="compact">
  314. <dt><code>ja %d,(%s|imm32),disp16</code></dt>
  315. <dd><p>Jump-always.
  316. </p></dd>
  317. <dt><code>jeq %d,(%s|imm32),disp16</code></dt>
  318. <dd><p>Jump if equal.
  319. </p></dd>
  320. <dt><code>jgt %d,(%s|imm32),disp16</code></dt>
  321. <dd><p>Jump if greater.
  322. </p></dd>
  323. <dt><code>jge %d,(%s|imm32),disp16</code></dt>
  324. <dd><p>Jump if greater or equal.
  325. </p></dd>
  326. <dt><code>jlt %d,(%s|imm32),disp16</code></dt>
  327. <dd><p>Jump if lesser.
  328. </p></dd>
  329. <dt><code>jle %d,(%s|imm32),disp16</code></dt>
  330. <dd><p>Jump if lesser or equal.
  331. </p></dd>
  332. <dt><code>jset %d,(%s|imm32),disp16</code></dt>
  333. <dd><p>Jump if signed equal.
  334. </p></dd>
  335. <dt><code>jne %d,(%s|imm32),disp16</code></dt>
  336. <dd><p>Jump if not equal.
  337. </p></dd>
  338. <dt><code>jsgt %d,(%s|imm32),disp16</code></dt>
  339. <dd><p>Jump if signed greater.
  340. </p></dd>
  341. <dt><code>jsge %d,(%s|imm32),disp16</code></dt>
  342. <dd><p>Jump if signed greater or equal.
  343. </p></dd>
  344. <dt><code>jslt %d,(%s|imm32),disp16</code></dt>
  345. <dd><p>Jump if signed lesser.
  346. </p></dd>
  347. <dt><code>jsle %d,(%s|imm32),disp16</code></dt>
  348. <dd><p>Jump if signed lesser or equal.
  349. </p></dd>
  350. </dl>
  351. <p>A call instruction is provided in order to perform calls to other eBPF
  352. functions, or to external kernel helpers:
  353. </p>
  354. <dl compact="compact">
  355. <dt><code>call (disp32|imm32)</code></dt>
  356. <dd><p>Jump and link to the offset <em>disp32</em>, or to the kernel helper
  357. function identified by <em>imm32</em>.
  358. </p></dd>
  359. </dl>
  360. <p>Finally:
  361. </p>
  362. <dl compact="compact">
  363. <dt><code>exit</code></dt>
  364. <dd><p>Terminate the eBPF program.
  365. </p></dd>
  366. </dl>
  367. <a name="Atomic-instructions"></a>
  368. <h4 class="subsubsection">9.7.4.8 Atomic instructions</h4>
  369. <p>Atomic exchange-and-add instructions are provided in two flavors: one
  370. for swapping 64-bit quantities and another for 32-bit quantities.
  371. </p>
  372. <dl compact="compact">
  373. <dt><code>xadddw [%d+offset16],%s</code></dt>
  374. <dd><p>Exchange-and-add a 64-bit value at the specified location.
  375. </p></dd>
  376. <dt><code>xaddw [%d+offset16],%s</code></dt>
  377. <dd><p>Exchange-and-add a 32-bit value at the specified location.
  378. </p></dd>
  379. </dl>
  380. <hr>
  381. <div class="header">
  382. <p>
  383. Previous: <a href="BPF-Directives.html#BPF-Directives" accesskey="p" rel="previous">BPF Directives</a>, Up: <a href="BPF_002dDependent.html#BPF_002dDependent" accesskey="u" rel="up">BPF-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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