AArch64-Directives.html 9.6 KB

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  59. <p>
  60. Next: <a href="AArch64-Opcodes.html#AArch64-Opcodes" accesskey="n" rel="next">AArch64 Opcodes</a>, Previous: <a href="AArch64-Floating-Point.html#AArch64-Floating-Point" accesskey="p" rel="previous">AArch64 Floating Point</a>, Up: <a href="AArch64_002dDependent.html#AArch64_002dDependent" accesskey="u" rel="up">AArch64-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  61. </div>
  62. <hr>
  63. <a name="AArch64-Machine-Directives"></a>
  64. <h4 class="subsection">9.1.5 AArch64 Machine Directives</h4>
  65. <a name="index-machine-directives_002c-AArch64"></a>
  66. <a name="index-AArch64-machine-directives"></a>
  67. <dl compact="compact">
  68. <dd>
  69. <a name="index-_002earch-directive_002c-AArch64"></a>
  70. </dd>
  71. <dt><code>.arch <var>name</var></code></dt>
  72. <dd><p>Select the target architecture. Valid values for <var>name</var> are the same as
  73. for the <samp>-march</samp> command-line option.
  74. </p>
  75. <p>Specifying <code>.arch</code> clears any previously selected architecture
  76. extensions.
  77. </p>
  78. <a name="index-_002earch_005fextension-directive_002c-AArch64"></a>
  79. </dd>
  80. <dt><code>.arch_extension <var>name</var></code></dt>
  81. <dd><p>Add or remove an architecture extension to the target architecture. Valid
  82. values for <var>name</var> are the same as those accepted as architectural
  83. extensions by the <samp>-mcpu</samp> command-line option.
  84. </p>
  85. <p><code>.arch_extension</code> may be used multiple times to add or remove extensions
  86. incrementally to the architecture being compiled for.
  87. </p>
  88. <a name="index-_002ebss-directive_002c-AArch64"></a>
  89. </dd>
  90. <dt><code>.bss</code></dt>
  91. <dd><p>This directive switches to the <code>.bss</code> section.
  92. </p>
  93. <a name="index-_002ecpu-directive_002c-AArch64"></a>
  94. </dd>
  95. <dt><code>.cpu <var>name</var></code></dt>
  96. <dd><p>Set the target processor. Valid values for <var>name</var> are the same as
  97. those accepted by the <samp>-mcpu=</samp> command-line option.
  98. </p>
  99. <a name="index-_002edword-directive_002c-AArch64"></a>
  100. </dd>
  101. <dt><code>.dword <var>expressions</var></code></dt>
  102. <dd><p>The <code>.dword</code> directive produces 64 bit values.
  103. </p>
  104. <a name="index-_002eeven-directive_002c-AArch64"></a>
  105. </dd>
  106. <dt><code>.even</code></dt>
  107. <dd><p>The <code>.even</code> directive aligns the output on the next even byte
  108. boundary.
  109. </p>
  110. <a name="index-_002efloat16-directive_002c-AArch64"></a>
  111. </dd>
  112. <dt><code>.float16 <var>value [,...,value_n]</var></code></dt>
  113. <dd><p>Place the half precision floating point representation of one or more
  114. floating-point values into the current section.
  115. The format used to encode the floating point values is always the
  116. IEEE 754-2008 half precision floating point format.
  117. </p>
  118. <a name="index-_002einst-directive_002c-AArch64"></a>
  119. </dd>
  120. <dt><code>.inst <var>expressions</var></code></dt>
  121. <dd><p>Inserts the expressions into the output as if they were instructions,
  122. rather than data.
  123. </p>
  124. <a name="index-_002eltorg-directive_002c-AArch64"></a>
  125. </dd>
  126. <dt><code>.ltorg</code></dt>
  127. <dd><p>This directive causes the current contents of the literal pool to be
  128. dumped into the current section (which is assumed to be the .text
  129. section) at the current location (aligned to a word boundary).
  130. GAS maintains a separate literal pool for each section and each
  131. sub-section. The <code>.ltorg</code> directive will only affect the literal
  132. pool of the current section and sub-section. At the end of assembly
  133. all remaining, un-empty literal pools will automatically be dumped.
  134. </p>
  135. <p>Note - older versions of GAS would dump the current literal
  136. pool any time a section change occurred. This is no longer done, since
  137. it prevents accurate control of the placement of literal pools.
  138. </p>
  139. <a name="index-_002epool-directive_002c-AArch64"></a>
  140. </dd>
  141. <dt><code>.pool</code></dt>
  142. <dd><p>This is a synonym for .ltorg.
  143. </p>
  144. <a name="index-_002ereq-directive_002c-AArch64"></a>
  145. </dd>
  146. <dt><code><var>name</var> .req <var>register name</var></code></dt>
  147. <dd><p>This creates an alias for <var>register name</var> called <var>name</var>. For
  148. example:
  149. </p>
  150. <div class="smallexample">
  151. <pre class="smallexample"> foo .req w0
  152. </pre></div>
  153. <p>ip0, ip1, lr and fp are automatically defined to
  154. alias to X16, X17, X30 and X29 respectively.
  155. </p>
  156. <a name="index-_002etlsdescadd-directive_002c-AArch64"></a>
  157. </dd>
  158. <dt><code><code>.tlsdescadd</code></code></dt>
  159. <dd><p>Emits a TLSDESC_ADD reloc on the next instruction.
  160. </p>
  161. <a name="index-_002etlsdesccall-directive_002c-AArch64"></a>
  162. </dd>
  163. <dt><code><code>.tlsdesccall</code></code></dt>
  164. <dd><p>Emits a TLSDESC_CALL reloc on the next instruction.
  165. </p>
  166. <a name="index-_002etlsdescldr-directive_002c-AArch64"></a>
  167. </dd>
  168. <dt><code><code>.tlsdescldr</code></code></dt>
  169. <dd><p>Emits a TLSDESC_LDR reloc on the next instruction.
  170. </p>
  171. <a name="index-_002eunreq-directive_002c-AArch64"></a>
  172. </dd>
  173. <dt><code>.unreq <var>alias-name</var></code></dt>
  174. <dd><p>This undefines a register alias which was previously defined using the
  175. <code>req</code> directive. For example:
  176. </p>
  177. <div class="smallexample">
  178. <pre class="smallexample"> foo .req w0
  179. .unreq foo
  180. </pre></div>
  181. <p>An error occurs if the name is undefined. Note - this pseudo op can
  182. be used to delete builtin in register name aliases (eg &rsquo;w0&rsquo;). This
  183. should only be done if it is really necessary.
  184. </p>
  185. <a name="index-_002evariant_005fpcs-directive_002c-AArch64"></a>
  186. </dd>
  187. <dt><code>.variant_pcs <var>symbol</var></code></dt>
  188. <dd><p>This directive marks <var>symbol</var> referencing a function that may
  189. follow a variant procedure call standard with different register
  190. usage convention from the base procedure call standard.
  191. </p>
  192. <a name="index-_002exword-directive_002c-AArch64"></a>
  193. </dd>
  194. <dt><code>.xword <var>expressions</var></code></dt>
  195. <dd><p>The <code>.xword</code> directive produces 64 bit values. This is the same
  196. as the <code>.dword</code> directive.
  197. </p>
  198. <a name="index-_002ecfi_005fb_005fkey_005fframe-directive_002c-AArch64"></a>
  199. </dd>
  200. <dt><code><code>.cfi_b_key_frame</code></code></dt>
  201. <dd><p>The <code>.cfi_b_key_frame</code> directive inserts a &rsquo;B&rsquo; character into the CIE
  202. corresponding to the current frame&rsquo;s FDE, meaning that its return address has
  203. been signed with the B-key. If two frames are signed with differing keys then
  204. they will not share the same CIE. This information is intended to be used by
  205. the stack unwinder in order to properly authenticate return addresses.
  206. </p>
  207. </dd>
  208. </dl>
  209. <hr>
  210. <div class="header">
  211. <p>
  212. Next: <a href="AArch64-Opcodes.html#AArch64-Opcodes" accesskey="n" rel="next">AArch64 Opcodes</a>, Previous: <a href="AArch64-Floating-Point.html#AArch64-Floating-Point" accesskey="p" rel="previous">AArch64 Floating Point</a>, Up: <a href="AArch64_002dDependent.html#AArch64_002dDependent" accesskey="u" rel="up">AArch64-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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