ax_isp_iq_api.h 78 KB

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  1. /**********************************************************************************
  2. *
  3. * Copyright (c) 2019-2020 Beijing AXera Technology Co., Ltd. All Rights Reserved.
  4. *
  5. * This source file is the property of Beijing AXera Technology Co., Ltd. and
  6. * may not be copied or distributed in any isomorphic form without the prior
  7. * written consent of Beijing AXera Technology Co., Ltd.
  8. *
  9. **********************************************************************************/
  10. #ifndef __AX_ISP_IQ_API_H__
  11. #define __AX_ISP_IQ_API_H__
  12. #include "ax_base_type.h"
  13. #include "ax_global_type.h"
  14. #include "ax_isp_common.h"
  15. #include "ax_isp_debug.h"
  16. #ifdef __cplusplus
  17. extern "C"
  18. {
  19. #endif
  20. #define AX_ISP_AUTO_TABLE_MAX_NUM (16)
  21. #define AX_ISP_GAIN_GRP_NUM (24)
  22. #define AX_ISP_EXPOSE_TIME_GRP_NUM (10)
  23. /************************************************************************************
  24. * BLC IQ Param: SBL + GBL
  25. ************************************************************************************/
  26. #define AX_ISP_BLC_SBL_WIN_NUM (4)
  27. #define AX_ISP_BLC_GBL_IIR_SIZE (8)
  28. typedef struct {
  29. AX_U32 nSblRValue[AX_ISP_BLC_SBL_WIN_NUM]; /* Accuracy: U8.12 Range: [0, 0xFFFFF] */
  30. AX_U32 nSblGrValue[AX_ISP_BLC_SBL_WIN_NUM]; /* Accuracy: U8.12 Range: [0, 0xFFFFF] */
  31. AX_U32 nSblGbValue[AX_ISP_BLC_SBL_WIN_NUM]; /* Accuracy: U8.12 Range: [0, 0xFFFFF] */
  32. AX_U32 nSblBValue[AX_ISP_BLC_SBL_WIN_NUM]; /* Accuracy: U8.12 Range: [0, 0xFFFFF] */
  33. } AX_ISP_IQ_BLC_MANUAL_T;
  34. typedef struct {
  35. AX_U8 nGainGrpNum; /* Gain dimension num. Accuracy: U8.0 Range: [0, AX_ISP_GAIN_GRP_NUM] */
  36. AX_U8 nExposeTimeGrpNum; /* ExposeTime dimension num. Accuracy: U8.0 Range: [0, AX_ISP_EXPOSE_TIME_GRP_NUM] */
  37. AX_U32 nGain[AX_ISP_GAIN_GRP_NUM]; /* Again value for sbl tunning. Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF] */
  38. AX_U32 nExposeTime[AX_ISP_EXPOSE_TIME_GRP_NUM]; /* ExposeTime value for sbl tunning. Accuracy: U32 Range: [0x0, 0xFFFFFFFF] */
  39. AX_U32 nAutoSblRValue[AX_ISP_GAIN_GRP_NUM][AX_ISP_EXPOSE_TIME_GRP_NUM]; /* offline sbl tunning value for R channel. Accuracy: U8.12 Range: [0, 0xFFFFF] */
  40. AX_U32 nAutoSblGrValue[AX_ISP_GAIN_GRP_NUM][AX_ISP_EXPOSE_TIME_GRP_NUM]; /* offline sbl tunning value for Gr channel. Accuracy: U8.12 Range: [0, 0xFFFFF] */
  41. AX_U32 nAutoSblGbValue[AX_ISP_GAIN_GRP_NUM][AX_ISP_EXPOSE_TIME_GRP_NUM]; /* offline sbl tunning value for Gb channel. Accuracy: U8.12 Range: [0, 0xFFFFF] */
  42. AX_U32 nAutoSblBValue[AX_ISP_GAIN_GRP_NUM][AX_ISP_EXPOSE_TIME_GRP_NUM]; /* offline sbl tunning value for B channel. Accuracy: U8.12 Range: [0, 0xFFFFF] */
  43. } AX_ISP_IQ_BLC_AUTO_TABLE_T;
  44. typedef struct {
  45. AX_ISP_IQ_BLC_AUTO_TABLE_T tHcgAutoTable;
  46. AX_ISP_IQ_BLC_AUTO_TABLE_T tLcgAutoTable;
  47. } AX_ISP_IQ_BLC_AUTO_T;
  48. typedef struct {
  49. AX_U8 nBlcEnable; /* sbl correction enable */
  50. AX_U8 nAutoMode; /* 0: manual, 1: auto */
  51. AX_ISP_IQ_BLC_MANUAL_T tManualParam;
  52. AX_ISP_IQ_BLC_AUTO_T tAutoParam;
  53. } AX_ISP_IQ_BLC_PARAM_T;
  54. typedef struct {
  55. AX_U8 nGblEnable; /* GBL enable */
  56. AX_U8 nBlcDetSel; /* 0: use det0 win0 result 1: use det1 win0 result */
  57. AX_U8 nGblIirRate[AX_ISP_BLC_GBL_IIR_SIZE]; /* Accuracy: U1.6 Range: [0, 0x7F] */
  58. AX_U16 nGblIirTh[AX_ISP_BLC_GBL_IIR_SIZE]; /* Accuracy: U4.12 Range: [0, 0xFFFF] */
  59. } AX_ISP_IQ_GBL_PARAM_T;
  60. /************************************************************************************
  61. * FPN IQ Param
  62. ************************************************************************************/
  63. typedef struct {
  64. AX_S32 nRangeMax; /* max threshold of saturation for VOB pixel. Accuracy: S8.8 Range: [-65535, 65535] */
  65. AX_S32 nRangeMin; /* min threshold of saturation for VOB pixel. Accuracy: S8.8 Range: [-65535, 65535] */
  66. AX_U32 nIirRate; /* smooth ratio. Accuracy: U1.8 Range: [0, 0x1FF] */
  67. } AX_ISP_IQ_FPN_CTRL_T;
  68. typedef struct {
  69. AX_U8 nFpnEnable; /* FPN enable */
  70. AX_ISP_IQ_FPN_CTRL_T tCtrlParam; /* FPN control parameters */
  71. } AX_ISP_IQ_FPN_PARAM_T;
  72. /************************************************************************************
  73. * DarkSharding IQ Param
  74. ************************************************************************************/
  75. #define AX_ISP_BLC_MESH_SIZE_H (24)
  76. #define AX_ISP_BLC_MESH_SIZE_V (24)
  77. typedef struct {
  78. AX_U16 nMeshLut[AX_ISP_BLC_MESH_SIZE_H][AX_ISP_BLC_MESH_SIZE_V]; /* mesh lut for the specific Again and ExposeTime. Accuracy: U8.8 Range: [0, 0xFFFF] */
  79. } AX_ISP_IQ_DS_MESH_LUT_T;
  80. typedef struct {
  81. AX_U8 nGainGrpNum; /* Gain dimension num. Accuracy: U8.0 Range: [0, AX_ISP_GAIN_GRP_NUM] */
  82. AX_U8 nExposeTimeGrpNum; /* ExposeTime dimension num. Accuracy: U8.0 Range: [0, AX_ISP_EXPOSE_TIME_GRP_NUM] */
  83. AX_U32 nGain[AX_ISP_GAIN_GRP_NUM]; /* Again value for sbl tunning. Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF] */
  84. AX_U32 nExposeTime[AX_ISP_EXPOSE_TIME_GRP_NUM]; /* ExposeTime value for sbl tunning. Accuracy: U32 Range: [0x0, 0xFFFFFFFF] */
  85. AX_ISP_IQ_DS_MESH_LUT_T tMeshTab[AX_ISP_GAIN_GRP_NUM][AX_ISP_EXPOSE_TIME_GRP_NUM]; /* Dark Shading mesh table */
  86. } AX_ISP_IQ_DS_AUTO_TABLE_T;
  87. typedef struct {
  88. AX_ISP_IQ_DS_AUTO_TABLE_T tHcgAutoTable;
  89. AX_ISP_IQ_DS_AUTO_TABLE_T tLcgAutoTable;
  90. } AX_ISP_IQ_DS_AUTO_T;
  91. typedef struct {
  92. AX_ISP_IQ_DS_MESH_LUT_T tMeshTab; /* Dark Shading mesh table */
  93. } AX_ISP_IQ_DS_MANUAL_T;
  94. typedef struct {
  95. AX_U8 nDsEnable; /* Dark Shading enable */
  96. AX_U8 nAutoMode; /* 0: manual, 1: auto */
  97. AX_ISP_IQ_DS_MANUAL_T tManualParam;
  98. AX_ISP_IQ_DS_AUTO_T tAutoParam;
  99. } AX_ISP_IQ_DS_PARAM_T;
  100. /************************************************************************************
  101. * DPC IQ Param
  102. ************************************************************************************/
  103. #define AX_ISP_DPC_NOISE_PARAM_NUM (4)
  104. #define AX_ISP_DPC_SBPC_BUFFER_MAX (8192)
  105. #define AX_ISP_DPC_QUICK_DET_TH_NUM (3)
  106. #define AX_ISP_DPC_DYNAMIC_STATIC_PDAF_NUM (3)
  107. typedef struct {
  108. AX_U8 nDetM1; /* detect bad pixel. Accuracy: U4.4 Range: [0, 255] */
  109. AX_U8 nDetM2; /* detect bad pixel. Accuracy: U4.4 Range: [0, 255] */
  110. AX_U8 nInterpolateM3; /* Interpolation for bad pixel. Accuracy: U1.7 Range: [0, 255] */
  111. AX_U8 nInterpolateM4; /* Interpolation for bad pixel. Accuracy: U1.7 Range: [0, 128] */
  112. AX_U16 nMarginU[AX_ISP_DPC_DYNAMIC_STATIC_PDAF_NUM]; /* prevent excessive saturation. Accuracy: U8.6 Range: [0, 16320] */
  113. AX_U16 nMarginL[AX_ISP_DPC_DYNAMIC_STATIC_PDAF_NUM]; /* prevent excessive saturation. Accuracy: U8.6 Range: [0, 16320] */
  114. AX_U8 nColorLimitRatio[AX_ISP_DPC_DYNAMIC_STATIC_PDAF_NUM]; /* prevent excessive saturation. Accuracy: U1.7 Range: [0, 128] */
  115. AX_U16 nQuickDetThreshold[AX_ISP_DPC_QUICK_DET_TH_NUM]; /* Accuracy: U8.6 Range: [0, 0x3FFF] */
  116. } AX_ISP_IQ_DPC_MANUAL_T;
  117. typedef struct {
  118. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  119. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  120. AX_U8 nDetM1[AX_ISP_AUTO_TABLE_MAX_NUM]; /* detect bad pixel. Accuracy: U4.4 Range: [0, 255] */
  121. AX_U8 nDetM2[AX_ISP_AUTO_TABLE_MAX_NUM]; /* detect bad pixel. Accuracy: U4.4 Range: [0, 255] */
  122. AX_U8 nInterpolateM3[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Interpolation for bad pixel. Accuracy: U1.7 Range: [0, 255] */
  123. AX_U8 nInterpolateM4[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Interpolation for bad pixel. Accuracy: U1.7 Range: [0, 128] */
  124. AX_U16 nMarginU[AX_ISP_AUTO_TABLE_MAX_NUM][AX_ISP_DPC_DYNAMIC_STATIC_PDAF_NUM]; /* prevent excessive saturation. Accuracy: U8.6 Range: [0, 16320] */
  125. AX_U16 nMarginL[AX_ISP_AUTO_TABLE_MAX_NUM][AX_ISP_DPC_DYNAMIC_STATIC_PDAF_NUM]; /* prevent excessive saturation. Accuracy: U8.6 Range: [0, 16320] */
  126. AX_U8 nColorLimitRatio[AX_ISP_AUTO_TABLE_MAX_NUM][AX_ISP_DPC_DYNAMIC_STATIC_PDAF_NUM]; /* prevent excessive saturation. Accuracy: U1.7 Range: [0, 128] */
  127. AX_U16 nQuickDetThreshold[AX_ISP_AUTO_TABLE_MAX_NUM][AX_ISP_DPC_QUICK_DET_TH_NUM]; /* Accuracy: U8.6 Range: [0, 0x3FFF] */
  128. } AX_ISP_IQ_DPC_AUTO_T;
  129. typedef struct {
  130. AX_U32 nSbpcLength; /* Accuracy: U32 Range: [0, AX_ISP_DPC_SBPC_BUFFER_MAX] */
  131. AX_U32 nSbpcBuffer[AX_ISP_DPC_SBPC_BUFFER_MAX]; /* Accuracy: U32 Range: [0, 0xFFFFFFFF] */
  132. AX_S32 nShotNoiseCoeffsA[AX_ISP_DPC_NOISE_PARAM_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  133. AX_S32 nShotNoiseCoeffsB[AX_ISP_DPC_NOISE_PARAM_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  134. AX_S32 nReadNoiseCoeffsA[AX_ISP_DPC_NOISE_PARAM_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  135. AX_S32 nReadNoiseCoeffsB[AX_ISP_DPC_NOISE_PARAM_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  136. AX_S32 nReadNoiseCoeffsC[AX_ISP_DPC_NOISE_PARAM_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  137. } AX_ISP_DPC_NOISE_SBPC_T;
  138. typedef struct {
  139. AX_ISP_DPC_NOISE_SBPC_T tHcgTable;
  140. AX_ISP_DPC_NOISE_SBPC_T tLcgTable;
  141. } AX_ISP_DPC_TABLE_T;
  142. typedef struct {
  143. AX_U8 nDpcEnable; /* dpc enable */
  144. AX_U8 nSbpcEnable; /* sbpc enable */
  145. AX_U8 nQuickDetEnable; /* QuickDet enable */
  146. AX_ISP_DPC_TABLE_T tDpcParam;
  147. AX_U8 nAutoMode; /* for ref auto or manual adjust mode, Range: [0,1], 0: manual, 1:auto, default:1 */
  148. AX_U8 nRefMode; /* choose ref mode, Range: [0,1], 0:use lux as ref, 1:use gain as ref */
  149. AX_ISP_IQ_DPC_MANUAL_T tManualParam;
  150. AX_ISP_IQ_DPC_AUTO_T tAutoParam;
  151. } AX_ISP_IQ_DPC_PARAM_T;
  152. /************************************************************************************
  153. * WNR IQ Param
  154. ************************************************************************************/
  155. #define AX_ISP_WNR_BYAER_NUM (4)
  156. #define AX_ISP_WNR_STRENGTH_LUT_SIZE (128)
  157. #define AX_ISP_WNR_WEIGHT_SIZE (16)
  158. #define AX_ISP_WNR_AUTO_TABLE_MAX_NUM (9)
  159. typedef struct {
  160. AX_S32 nShotNoiseCoeffsA[AX_ISP_WNR_BYAER_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  161. AX_S32 nShotNoiseCoeffsB[AX_ISP_WNR_BYAER_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  162. AX_S32 nReadNoiseCoeffsA[AX_ISP_WNR_BYAER_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  163. AX_S32 nReadNoiseCoeffsB[AX_ISP_WNR_BYAER_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  164. AX_S32 nReadNoiseCoeffsC[AX_ISP_WNR_BYAER_NUM]; /* Accuracy: S0.31 Range: [-0x7FFFFFFF, 0x7FFFFFFF] */
  165. } AX_ISP_WNR_NOISE_T;
  166. typedef struct {
  167. AX_ISP_WNR_NOISE_T tHcgTable;
  168. AX_ISP_WNR_NOISE_T tLcgTable;
  169. } AX_ISP_WNR_NOISE_TABLE_T;
  170. typedef struct {
  171. AX_U16 nRatio[AX_ISP_WNR_BYAER_NUM]; /* Ratio. Accuracy: U8.8 Range: [1, 65535] */
  172. AX_U16 nShrinkageStrength; /*2D Shrinkage Strength. Accuracy: U8.8 Range: [1, 65535] */
  173. AX_U8 nShrinkageWeight[AX_ISP_WNR_WEIGHT_SIZE][AX_ISP_WNR_WEIGHT_SIZE]; /*2D Shrinkage Weight. Accuracy: U1.7 Range: [0, 128] */
  174. AX_U16 nBlendStrength; /*3D Blend Strength. Accuracy: U8.8 Range: [1, 65535] */
  175. AX_U8 nBlendWeight[AX_ISP_WNR_WEIGHT_SIZE][AX_ISP_WNR_WEIGHT_SIZE];/*3D Blend Weight. Accuracy: U1.7 Range: [0, 128] */
  176. AX_U16 nDeghostStrength; /*3D Deghost Strength. Accuracy: U8.8 Range: [1, 65535] */
  177. AX_U16 nStrengthLut[AX_ISP_WNR_STRENGTH_LUT_SIZE]; /*3D Strength Lut. Accuracy: U8.8 Range: [1, 65535] */
  178. } AX_ISP_IQ_WNR_2D_3DNR_PARAM_T;
  179. typedef struct {
  180. AX_U8 nWnrMode; /* Wnr mode. Accuracy: U2 Range: 1,2,3 */
  181. AX_ISP_IQ_WNR_2D_3DNR_PARAM_T tWnrParam;
  182. } AX_ISP_IQ_WNR_MANUAL_T;
  183. typedef struct {
  184. AX_U8 nSubGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_WNR_AUTO_TABLE_MAX_NUM] */
  185. AX_U8 nWnrMode; /* Wnr mode. Accuracy: U2 Range: 1,2,3 */
  186. AX_U32 nIsoThresholdValue[AX_ISP_WNR_AUTO_TABLE_MAX_NUM]; /* choose ref value. Accuracy: U16 Value Range: [1, 65535] */
  187. AX_ISP_IQ_WNR_2D_3DNR_PARAM_T tWnrParam[AX_ISP_WNR_AUTO_TABLE_MAX_NUM];
  188. } AX_ISP_IQ_WNR_AUTO_PARAM_T;
  189. typedef struct {
  190. AX_U8 nGrpNum; /*Group number. Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  191. AX_ISP_IQ_WNR_AUTO_PARAM_T tSubAutoParam[AX_ISP_AUTO_TABLE_MAX_NUM];
  192. } AX_ISP_IQ_WNR_AUTO_T;
  193. typedef struct {
  194. AX_U8 nWnrEn; /* Wnr enable. Accuracy: U1 Range: [0, 1] */
  195. AX_U8 nAutoMode; /* for ref auto or manual adjust mode. Accuracy: U1 Range: [0, 1] */
  196. AX_ISP_WNR_NOISE_TABLE_T tWnrNoiseParam;
  197. AX_ISP_IQ_WNR_MANUAL_T tManualParam;
  198. AX_ISP_IQ_WNR_AUTO_T tAutoParam;
  199. } AX_ISP_IQ_WNR_PARAM_T;
  200. /************************************************************************************
  201. * CAC IQ Param
  202. ************************************************************************************/
  203. #define AX_ISP_CAC_FOCUS_LENG (2)
  204. #define AX_ISP_CAC_COLOR_TEMP (4)
  205. #define AX_ISP_CAC_LUT_SIZE (32)
  206. typedef struct {
  207. AX_U32 nScaler[AX_ISP_CAC_LUT_SIZE]; /* pixel position shift lut. Accuracy: U1.28 Range: [214748365, 322122547] */
  208. } AX_ISP_IQ_CAC_LUT_T;
  209. typedef struct {
  210. AX_U32 nRXCoord; /* ellipse center x_coord. Accuracy: U12.8 Range: [0x8000, 0x100000)*/
  211. AX_U32 nRYCoord; /* ellipse center y_coord. Accuracy: U12.8 Range: [0x8000, 0x100000)*/
  212. AX_S32 nRAParam; /* ellipse parameter A. Accuracy: S0.22 Range: (-4194304, 4194304) */
  213. AX_S32 nRBParam; /* ellipse parameter B. Accuracy: S0.22 Range: (-4194304, 4194304) */
  214. AX_S32 nRCParam; /* ellipse parameter C. Accuracy: S0.22 Range: (-4194304, 4194304) */
  215. AX_U32 nRMaxRadInv; /* inv of bound value in lut. Accuracy: U3.18 Range: [52429, 2097152) */
  216. AX_ISP_IQ_CAC_LUT_T tRScaler; /* pixel position shift lut. Accuracy: U1.28 Range: [214748365, 322122547] */
  217. AX_U32 nBXCoord; /* ellipse center x_coord. Accuracy: U12.8 Range: [0x8000, 0x100000)*/
  218. AX_U32 nBYCoord; /* ellipse center y_coord. Accuracy: U12.8 Range: [0x8000, 0x100000)*/
  219. AX_S32 nBAParam; /* ellipse parameter A. Accuracy: S0.22 Range: (-4194304, 4194304) */
  220. AX_S32 nBBParam; /* ellipse parameter B. Accuracy: S0.22 Range: (-4194304, 4194304) */
  221. AX_S32 nBCParam; /* ellipse parameter C. Accuracy: S0.22 Range: (-4194304, 4194304) */
  222. AX_U32 nBMaxRadInv; /* inv of bound value in lut. Accuracy: U3.18 Range: [52429, 2097152) */
  223. AX_ISP_IQ_CAC_LUT_T tBScaler; /* pixel position shift lut. Accuracy: U1.28 Range: [214748365, 322122547] */
  224. AX_U8 nAParamLeftShift; /* left bit shift for ellipse parameter A. Accuracy: U5 Range: [0x10, 0x18] */
  225. AX_U8 nBParamLeftShift; /* left bit shift for ellipse parameter B. Accuracy: U5 Range: [0x10, 0x18] */
  226. AX_U8 nCParamLeftShift; /* left bit shift for ellipse parameter C. Accuracy: U5 Range: [0x10, 0x18] */
  227. } AX_ISP_IQ_CAC_MANUAL_T;
  228. typedef struct {
  229. AX_U8 nFocusGrpNum; /* Accuacy: U8 Range: [0, AX_ISP_CAC_FOCUS_LENG] */
  230. AX_U8 nColorGrpNum; /* Accuacy: U8 Range: [0, AX_ISP_CAC_COLOR_TEMP] */
  231. AX_U8 nFocusVal[AX_ISP_CAC_FOCUS_LENG]; /* The normalized value by focus value. Accuacy: U8 Range: [0, 100] */
  232. AX_U32 nColorTemp[AX_ISP_CAC_COLOR_TEMP]; /* Accuracy: U32.0 Range: [0, 100000] */
  233. AX_U32 nRXCoord[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse center x_coord. Accuracy: U12.8 Range: [0x8000, 0x100000) */
  234. AX_U32 nRYCoord[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse center y_coord. Accuracy: U12.8 Range: [0x8000, 0x100000) */
  235. AX_S32 nRAParam[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse parameter A. Accuracy: S0.22 Range: (-4194304, 4194304) */
  236. AX_S32 nRBParam[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse parameter B. Accuracy: S0.22 Range: (-4194304, 4194304) */
  237. AX_S32 nRCParam[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse parameter C. Accuracy: S0.22 Range: (-4194304, 4194304) */
  238. AX_U32 nRMaxRadInv[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* inv of bound value in lut. Accuracy: U3.18 Range: [52429, 2097152)*/
  239. AX_ISP_IQ_CAC_LUT_T tRLut[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* pixel position shift lut. Accuracy: U1.28 Range: [214748365, 322122547] */
  240. AX_U32 nBXCoord[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse center x_coord. Accuracy: U12.8 Range: [0x8000, 0x100000) */
  241. AX_U32 nBYCoord[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse center y_coord. Accuracy: U12.8 Range: [0x8000, 0x100000) */
  242. AX_S32 nBAParam[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse parameter A. Accuracy: S0.22 Range: (-4194304, 4194304) */
  243. AX_S32 nBBParam[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse parameter B. Accuracy: S0.22 Range: (-4194304, 4194304) */
  244. AX_S32 nBCParam[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* ellipse parameter C. Accuracy: S0.22 Range: (-4194304, 4194304) */
  245. AX_U32 nBMaxRadInv[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* inv of bound value in lut. Accuracy: U3.18 Range: [52429, 2097152) */
  246. AX_ISP_IQ_CAC_LUT_T tBLut[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* pixel position shift lut. Accuracy: U1.28 Range: [214748365, 322122547] */
  247. AX_U8 nAParamLeftShift[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* left bit shift for ellipse parameter A. Accuracy: U5 Range: [0x10, 0x18] */
  248. AX_U8 nBParamLeftShift[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* left bit shift for ellipse parameter B. Accuracy: U5 Range: [0x10, 0x18] */
  249. AX_U8 nCParamLeftShift[AX_ISP_CAC_FOCUS_LENG][AX_ISP_CAC_COLOR_TEMP]; /* left bit shift for ellipse parameter C. Accuracy: U5 Range: [0x10, 0x18] */
  250. } AX_ISP_IQ_CAC_AUTO_T;
  251. typedef struct {
  252. AX_U8 nCacEnable; /* Accuracy: U8 Range: [0, 1] */
  253. AX_U8 nAutoMode; /* Accuracy: U8 Range: [0, 1]; 0: manual, 1: auto */
  254. AX_ISP_IQ_CAC_MANUAL_T tManualCtrl;
  255. AX_ISP_IQ_CAC_AUTO_T tAutoParam;
  256. } AX_ISP_IQ_CAC_PARAM_T;
  257. /************************************************************************************
  258. * LSC IQ Param
  259. ************************************************************************************/
  260. #define AX_ISP_LSC_MESH_SIZE_V (15)
  261. #define AX_ISP_LSC_MESH_SIZE_H (19)
  262. #define AX_ISP_LSC_COLOR_TEMP_GRP_NUM (10)
  263. typedef struct AX_ISP_IQ_LSC_COLOR_MESH_T {
  264. AX_U32 nRRMeshLut[AX_ISP_LSC_MESH_SIZE_V][AX_ISP_LSC_MESH_SIZE_H]; /* Accuacy U4.14 Range: [0x4000, 0x3FFFF] */
  265. AX_U32 nGRMeshLut[AX_ISP_LSC_MESH_SIZE_V][AX_ISP_LSC_MESH_SIZE_H]; /* Accuacy U4.14 Range: [0x4000, 0x3FFFF] */
  266. AX_U32 nGBMeshLut[AX_ISP_LSC_MESH_SIZE_V][AX_ISP_LSC_MESH_SIZE_H]; /* Accuacy U4.14 Range: [0x4000, 0x3FFFF] */
  267. AX_U32 nBBMeshLut[AX_ISP_LSC_MESH_SIZE_V][AX_ISP_LSC_MESH_SIZE_H]; /* Accuacy U4.14 Range: [0x4000, 0x3FFFF] */
  268. } AX_ISP_IQ_LSC_COLOR_MESH_T;
  269. typedef struct AX_ISP_IQ_LSC_LUMA_MESH_T {
  270. AX_U32 nLumaMeshLut[AX_ISP_LSC_MESH_SIZE_V][AX_ISP_LSC_MESH_SIZE_H]; /* Accuacy U4.14 Range: [0x4000, 0x3FFFF] */
  271. } AX_ISP_IQ_LSC_LUMA_MESH_T;
  272. typedef struct {
  273. AX_U8 nLumaRatio; /* Accuacy: U8 Range: [0, 100] */
  274. AX_ISP_IQ_LSC_LUMA_MESH_T tLumaMeshTab; /* Luma Shading mesh table */
  275. AX_ISP_IQ_LSC_COLOR_MESH_T tColorMeshTab; /* Color Shading mesh table */
  276. } AX_ISP_IQ_LSC_MANUAL_T;
  277. typedef struct {
  278. AX_U8 nParamGrpNum; /*Luma Grp Num; Accuacy: U8 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  279. AX_U32 nRefValStart[AX_ISP_AUTO_TABLE_MAX_NUM]; /*Ref Gain Start: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF];Ref Lux Start: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  280. AX_U32 nRefValEnd[AX_ISP_AUTO_TABLE_MAX_NUM]; /*Ref Gain End: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF];Ref Lux End: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  281. AX_U8 nLumaRatio[AX_ISP_AUTO_TABLE_MAX_NUM]; /*Luma Ratio; Accuacy: U8 Range: [0, 100] */
  282. AX_ISP_IQ_LSC_LUMA_MESH_T tLumaMeshTab; /*Calib Luma Shading mesh table */
  283. } AX_ISP_IQ_LSC_LUMA_PARAM_T;
  284. typedef struct {
  285. AX_U8 nColTempNum; /*Calib Color Temp Num; Accuracy: U8 Range: [0, AX_ISP_LSC_COLOR_TEMP_GRP_NUM] */
  286. AX_U32 nRefColorTempStart[AX_ISP_LSC_COLOR_TEMP_GRP_NUM]; /*Ref CCT Start; Accuracy: U32.0 Range: [0, 100000]*/
  287. AX_U32 nRefColorTempEnd[AX_ISP_LSC_COLOR_TEMP_GRP_NUM]; /*Ref CCT End; Accuracy: U32.0 Range: [0, 100000]*/
  288. AX_U32 nColorTemp[AX_ISP_LSC_COLOR_TEMP_GRP_NUM]; /*Calib CCT; Accuracy: U32.0 Range: [0, 100000] */
  289. AX_ISP_IQ_LSC_COLOR_MESH_T tColorMeshTab[AX_ISP_LSC_COLOR_TEMP_GRP_NUM]; /*Calib Color Shading mesh table */
  290. } AX_ISP_IQ_LSC_CT_PARAM_T;
  291. typedef struct {
  292. AX_U8 nDampRatio; /*Damp Ratio; Accuacy: U8 Range: [0, 100] */
  293. AX_ISP_IQ_LSC_LUMA_PARAM_T tLumaParam; /*Luma Params*/
  294. AX_ISP_IQ_LSC_CT_PARAM_T tColTempParam; /*Color Temp Params*/
  295. } AX_ISP_IQ_LSC_AUTO_T;
  296. typedef struct {
  297. AX_U8 nLscEn; /* Acuracy: U8 Range: [0, 1] */
  298. AX_U8 nRefMode; /* choose ref mode, Accuracy: U8 Range: [0, 1], 0: use lux as ref, 1: use gain as ref */
  299. AX_U8 nMeshMode; /* mesh mode, 1: mirror mode, 0: normal mode, Accuracy: U8 Range: [0, 1] */
  300. AX_U8 nAutoMode; /* for ref auto or manual adjust mode, Accuracy: U8 Range: [0, 1]; 0: manual, 1:auto, default:1 */
  301. AX_U8 nAlgMode; /* see AX_ISP_IQ_ALG_MODE_E Range: [0, 2] 0: effect priority mode 1: balance mode 2: performance mode */
  302. AX_ISP_IQ_LSC_MANUAL_T tManualParam;
  303. AX_ISP_IQ_LSC_AUTO_T tAutoParam;
  304. } AX_ISP_IQ_LSC_PARAM_T;
  305. #define AX_LTM_SCURVE_MAX_LEN (1025)
  306. #define AX_LTM_HISTOGRAM_WEIGHT_MAX_LEN (67)
  307. #define AX_LTM_HISTOGRAM_WEIGHT_NUM (16)
  308. #define AX_RLTM_HIST_REGION_NUM (4)
  309. /************************************************************************************
  310. * RLTM IQ Param
  311. ************************************************************************************/
  312. typedef struct {
  313. AX_U16 nHistogramWeight[AX_LTM_HISTOGRAM_WEIGHT_MAX_LEN]; /* histogram bin weights. Accuracy: U16 Range: [0, 65535], default 1*/
  314. } AX_ISP_IQ_RLTM_HW_T;
  315. typedef struct {
  316. AX_U8 nLocalFactor; /* Accuracy: U1.7 Range: [0, 128], default 90 */
  317. AX_U8 nHighlightSup; /* highlight suppress. Accuracy: U5.3 Range: [0, 255], default 50 */
  318. AX_U16 nKMax; /* limit brightness. Accuracy: U8.8 Range: [256, 65535], default 1024 */
  319. AX_U8 nPreGamma; /* for gamma lut. Accuracy: U3.5 Range: [32, 255], default 32 */
  320. AX_U8 nPostGamma; /* for invgamma lut. Accuracy: U3.5 Range: [32, 255], default 64 */
  321. AX_U8 nDynamicRangeUpper; /* for dynamic range upper, not dependence on effect_strength. Accuracy: U1.7 Range: [90, 128], default 128 */
  322. AX_U8 nDynamicRangeLower; /* for dynamic range lower, not dependence on effect_strength. Accuracy: U1.7 Range: [0, 40], default 0 */
  323. AX_U16 nExtraDgain; /* for invgamma lut. Accuracy: U4.4 Range: [16, 255], default 16 */
  324. AX_U16 nWinSize; /* for hist. Accuracy: U16.0 Range: [64, 128, 256, 512, 1024], default 256 */
  325. AX_U8 nRltmStrength; /* Accuracy: U1.7 Range: [0, 128], default 64 */
  326. AX_U8 nLog10Offset; /* log10 offset. Accuracy: U3.5 Range: [0, 211], default 0 */
  327. AX_U8 nContrastStrength; /* contrast strength. Accuracy: U1.7 Range: [0, 255], default 42 */
  328. AX_U16 nBaseGain; /* base gain. Accuracy: U10.6 Range: [1, 65535], default 64 */
  329. AX_U8 nDitherMode; /* 0: no-dither, 1: before pre-gamma, 2: after pre-gamma 0. Accuracy: U2.0 Range: [0, 2], default 0 */
  330. AX_U16 nDitherScaler; /* for dither strength. Accuracy: U10.6 Range: [0, 65535], default 64 */
  331. AX_U8 nGtmSwEn; /* gtm software switch. Accuracy: U1.0 Range: [0, 1], default 0 */
  332. AX_U16 nGtmSwDgain; /* gtm dgain for software gtm curve. Accuracy: U8.8 Range: [256, 65535], default 256 */
  333. AX_U16 nSCurveList[AX_LTM_SCURVE_MAX_LEN]; /* s curve lut. Accuracy: U1.15 Range: [0, 32768]*/
  334. AX_ISP_IQ_RLTM_HW_T tHWeight[AX_LTM_HISTOGRAM_WEIGHT_NUM];
  335. } AX_ISP_IQ_RLTM_MANUAL_T;
  336. typedef struct {
  337. AX_U8 nParamGrpNum; /* Accuracy: U8 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  338. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  339. AX_U8 nLocalFactor[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Accuracy: U1.7 Range: [0, 128], default 90 */
  340. AX_U8 nHighlightSup[AX_ISP_AUTO_TABLE_MAX_NUM]; /* highlight suppress. Accuracy: U5.3 Range: [0, 255], default 50 */
  341. AX_U16 nKMax[AX_ISP_AUTO_TABLE_MAX_NUM]; /* limit brightness. Accuracy: U8.8 Range: [256, 65535], default 1024 */
  342. AX_U8 nPreGamma[AX_ISP_AUTO_TABLE_MAX_NUM]; /* for gamma lut. Accuracy: U3.5 Range: [32, 255], default 32 */
  343. AX_U8 nPostGamma[AX_ISP_AUTO_TABLE_MAX_NUM]; /* for invgamma lut. Accuracy: U3.5 Range: [32, 255], default 64 */
  344. AX_U8 nDynamicRangeUpper[AX_ISP_AUTO_TABLE_MAX_NUM];/* for dynamic range upper, not dependence on effect_strength. Accuracy: U1.7 Range: [90, 128], default 128 */
  345. AX_U8 nDynamicRangeLower[AX_ISP_AUTO_TABLE_MAX_NUM];/* for dynamic range lower, not dependence on effect_strength. Accuracy: U1.7 Range: [0, 40], default 0 */
  346. AX_U16 nExtraDgain[AX_ISP_AUTO_TABLE_MAX_NUM]; /* for invgamma lut. Accuracy: U4.4 Range: [16, 255], default 16 */
  347. AX_U16 nWinSize[AX_ISP_AUTO_TABLE_MAX_NUM]; /* for hist. Accuracy: U16.0 Range: [64, 128, 256, 512, 1024], default 256 */
  348. AX_U8 nRltmStrength[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Accuracy: U1.7 Range: [0, 128], default 64 */
  349. AX_U8 nLog10Offset[AX_ISP_AUTO_TABLE_MAX_NUM]; /* log10 offset. Accuracy: U3.5 Range: [0, 211], default 0 */
  350. AX_U8 nContrastStrength[AX_ISP_AUTO_TABLE_MAX_NUM]; /* contrast strength. Accuracy: U1.7 Range: [0, 255], default 42 */
  351. AX_U16 nBaseGain[AX_ISP_AUTO_TABLE_MAX_NUM]; /* base gain. Accuracy: U10.6 Range: [1, 65535], default 64 */
  352. AX_U8 nDitherMode[AX_ISP_AUTO_TABLE_MAX_NUM]; /* 0: no-dither, 1: before pre-gamma, 2: after pre-gamma 0. Accuracy: U2.0 Range: [0, 2], default 0 */
  353. AX_U16 nDitherScaler[AX_ISP_AUTO_TABLE_MAX_NUM]; /* for dither strength. Accuracy: U10.6 Range: [0, 65535], default 64 */
  354. AX_U8 nGtmSwEn[AX_ISP_AUTO_TABLE_MAX_NUM]; /* gtm software switch. Accuracy: U1.0 Range: [0, 1], default 0 */
  355. AX_U16 nGtmSwDgain[AX_ISP_AUTO_TABLE_MAX_NUM]; /* gtm dgain for software gtm curve. Accuracy: U8.8 Range: [256, 65535], default 256 */
  356. AX_U16 nSCurveList[AX_ISP_AUTO_TABLE_MAX_NUM][AX_LTM_SCURVE_MAX_LEN]; /* s curve lut. Accuracy: U1.15 Range: [0, 32768]*/
  357. AX_ISP_IQ_RLTM_HW_T tHWeight[AX_ISP_AUTO_TABLE_MAX_NUM][AX_LTM_HISTOGRAM_WEIGHT_NUM];
  358. } AX_ISP_IQ_RLTM_AUTO_T;
  359. typedef struct {
  360. AX_U16 nTop; /* Accuracy: U16 Range: [0, 8192] */
  361. AX_U16 nBottom; /* Accuracy: U16 Range: [0, 8192] */
  362. AX_U16 nLeft; /* Accuracy: U16 Range: [0, 8192] */
  363. AX_U16 nRight; /* Accuracy: U16 Range: [0, 8192] */
  364. } AX_ISP_IQ_RLTM_ROI_T;
  365. typedef struct {
  366. AX_U8 nMode; /* rltm base&advance mode. Accuracy:U8 Range: [0, 1] */
  367. AX_U8 nRegionNum; /* valide region number. Accuracy:U8 Range: [0, 4] */
  368. AX_U8 nHWNum; /* hist weight number. Accuracy:U8 Range: [1, 16] */
  369. AX_U8 nLow[AX_RLTM_HIST_REGION_NUM]; /* Lower limit of brightness range. Accuracy: U8 Range: [0, 66] */
  370. AX_U8 nHigh[AX_RLTM_HIST_REGION_NUM]; /* Upper limit of brightness range. Accuracy: U8 Range: [0, 66] */
  371. AX_U8 nThreshold[AX_RLTM_HIST_REGION_NUM]; /* Accuracy: U1.7 Range: [0, 129] */
  372. AX_U8 nFlagHistId[AX_LTM_HISTOGRAM_WEIGHT_NUM][AX_LTM_HISTOGRAM_WEIGHT_NUM]; /* Accuracy: U8 Range: [0, 1] */
  373. AX_ISP_IQ_RLTM_ROI_T tRoi;
  374. AX_ISP_IQ_RLTM_HW_T tHWeight;
  375. } AX_ISP_IQ_RLTM_MHW_T;
  376. typedef struct {
  377. AX_U8 nRltmEn; /* rltm en -- module control */
  378. AX_U8 nMultiCamSyncMode; /* 0:INDEPEND MODE; 1: MASTER SLAVE MODE; 2: OVERLAP MODE */
  379. AX_U8 nAutoMode; /* for ref auto or manual adjust mode, [0,1], 0: manual, 1:auto, default:1 */
  380. AX_U8 nRefMode; /* choose ref mode, [0,1], 0:use lux as ref, 1:use gain as ref */
  381. AX_U8 nAlgMode; /* see AX_ISP_IQ_ALG_MODE_E Range: [0, 2] 0: effect priority mode 1: balance mode 2: performance mode */
  382. AX_ISP_IQ_RLTM_MHW_T tMutiHW;
  383. AX_ISP_IQ_RLTM_MANUAL_T tManualParam;
  384. AX_ISP_IQ_RLTM_AUTO_T tAutoParam;
  385. } AX_ISP_IQ_RLTM_PARAM_T;
  386. /************************************************************************************
  387. * Dehaze IQ Param
  388. ************************************************************************************/
  389. typedef struct {
  390. AX_U8 nEffectStrength; /* for effect enhence. Accuracy: U7.0 Range: [0,128], default 0 */
  391. } AX_ISP_IQ_DEHAZE_MANUAL_T;
  392. typedef struct {
  393. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  394. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  395. AX_U8 nEffectStrength[AX_ISP_AUTO_TABLE_MAX_NUM]; /* for effect enhence. Accuracy: U7.0 Range: [0,128], default 0 */
  396. } AX_ISP_IQ_DEHAZE_AUTO_T;
  397. typedef struct {
  398. AX_U8 nDehazeEn; /* dehaze enable */
  399. AX_U8 nAutoMode; /* for lux auto or manual adjust mode, [0,1], 0: manual, 1:auto, default:1 */
  400. AX_U8 nRefMode; /* choose ref mode, [0,1], 0:use lux as ref, 1:use gain as ref, must be follow rltm'suRefMode */
  401. AX_ISP_IQ_DEHAZE_MANUAL_T tManualParam;
  402. AX_ISP_IQ_DEHAZE_AUTO_T tAutoParam;
  403. } AX_ISP_IQ_DEHAZE_PARAM_T;
  404. /************************************************************************************
  405. * Demosaic IQ Param
  406. ************************************************************************************/
  407. #define AX_ISP_DEMOSAIC_GAMMA_LUT_SIZE (8)
  408. typedef struct {
  409. AX_U8 nGradfRatio; /* gradient filter frequency adjustment ratio. Accuracy: U1.4 Range: [0, 0x10], default 12 */
  410. AX_U8 nStrength; /* edge direction estimation strength. Accuracy: U2.6 Range: [0, 255] */
  411. } AX_ISP_IQ_DEMOSAIC_MANUAL_T;
  412. typedef struct {
  413. AX_U8 nParamGrpNum; /* Accuracy: U8 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  414. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  415. AX_U8 nGradfRatio[AX_ISP_AUTO_TABLE_MAX_NUM]; /* gradient filter frequency adjustment ratio. Accuracy: U1.4 Range: [0, 0x10], default 12 */
  416. AX_U8 nStrength[AX_ISP_AUTO_TABLE_MAX_NUM]; /* edge direction estimation strength. Accuracy: U2.6 Range: [0, 255] */
  417. } AX_ISP_IQ_DEMOSAIC_AUTO_T;
  418. typedef struct {
  419. AX_U8 nDemosaicEn; /* Demosaic module enable, Range: [0, 1], 0: Disable, 1: Enable */
  420. AX_U8 nMode; /* U4, 0:diff ratio,1:copy to gray,2:copy to green,3:RGGB2RGB,4:divider ratio. set 4 at gain residual mode. default 4 */
  421. AX_U16 nGammaLut[AX_ISP_DEMOSAIC_GAMMA_LUT_SIZE]; /* set linear at gain residual mode. Accuracy: U8.6 Range: [0, 0x3FFF] */
  422. AX_U8 nClipLevel; /* Accuracy: U0.4 Range: [0, 0xF], default 8 */
  423. AX_U8 nRbclipEnable; /* 0: disable rbclip, 1:enable rbclip. set 1 at gain residual mode. */
  424. AX_U8 nFcsEnable; /* enable false color suppression, Range: [0, 1], 0: Disable, 1: Enable, default 0 */
  425. AX_U8 nAutoMode; /* for ref auto or manual adjust mode, [0,1], 0: manual, 1:auto, default:1 */
  426. AX_U8 nRefMode; /* choose ref mode, [0,1], 0:use lux as ref, 1:use gain as ref */
  427. AX_ISP_IQ_DEMOSAIC_MANUAL_T tManualParam;
  428. AX_ISP_IQ_DEMOSAIC_AUTO_T tAutoParam;
  429. } AX_ISP_IQ_DEMOSAIC_PARAM_T;
  430. /************************************************************************************
  431. * CLC IQ Param
  432. ************************************************************************************/
  433. #define AX_ISP_CLC_LUMA_RATIO_SIZE (3)
  434. #define AX_ISP_CLC_ANGLE_SIZE (16)
  435. #define AX_ISP_CLC_CCM_H_SIZE (2)
  436. #define AX_ISP_CLC_CCM_V_SIZE (3)
  437. #define AX_ISP_CLC_MAX_GROUP_SIZE (64)
  438. #define AX_ISP_CLC_MATRIX_COLOR_TEMP_SIZE (12)
  439. #define AX_ISP_CLC_MATRIX_SATURAT_SIZE (5)
  440. typedef struct {
  441. AX_S8 nSat; /* S1.6 [-64, 64] */
  442. AX_S16 nHue; /* s5.6 [-1920, 1920] */
  443. } AX_ISP_IQ_CLC_HS_CCM_T;
  444. typedef struct {
  445. AX_S8 nSat[AX_ISP_CLC_ANGLE_SIZE]; /* S1.6 [-32, 32] */
  446. AX_S16 nHue[AX_ISP_CLC_ANGLE_SIZE]; /* s5.6 [-640, 640] */
  447. } AX_ISP_IQ_CLC_HS_XCM_T;
  448. typedef struct {
  449. AX_S16 nMatrix[AX_ISP_CLC_CCM_V_SIZE][AX_ISP_CLC_CCM_H_SIZE]; /* Accuracy: S3.8 Range: [-2047, 2047] */
  450. } AX_ISP_IQ_CLC_CCM_T;
  451. typedef struct {
  452. AX_ISP_IQ_CLC_CCM_T tXcm[AX_ISP_CLC_ANGLE_SIZE];
  453. } AX_ISP_IQ_CLC_XCM_T;
  454. typedef struct {
  455. AX_ISP_IQ_CLC_HS_CCM_T tHsCcm;
  456. AX_ISP_IQ_CLC_HS_XCM_T tHsXcm;
  457. } AX_ISP_IQ_CLC_HS_T;
  458. typedef struct {
  459. AX_U16 nCtrlLevelCcm; /* U1.8 [0, 256] */
  460. AX_U16 nCtrlLevelXcm[AX_ISP_CLC_ANGLE_SIZE]; /* U1.8 [0, 256] */
  461. } AX_ISP_IQ_CLC_CTRL_LEVEL_T;
  462. typedef struct {
  463. AX_ISP_IQ_CLC_CCM_T tClcCcm;
  464. AX_ISP_IQ_CLC_HS_T tClcHs;
  465. AX_ISP_IQ_CLC_CTRL_LEVEL_T tClcCtrlLevel;
  466. } AX_ISP_IQ_CLC_MANUAL_T;
  467. typedef struct {
  468. AX_U32 nColorTemp; /* Accuracy: U32.0 Range: [0, 100000] */
  469. AX_U8 nSaturationNum; /* Accuracy: U8 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  470. AX_U32 nRefVal[AX_ISP_CLC_MATRIX_SATURAT_SIZE]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  471. AX_U32 nSaturation[AX_ISP_CLC_MATRIX_SATURAT_SIZE];/* Accuracy: U8.10 Range: [0, 204800] */
  472. AX_ISP_IQ_CLC_HS_T tClcHsList[AX_ISP_CLC_MATRIX_SATURAT_SIZE];
  473. AX_ISP_IQ_CLC_CTRL_LEVEL_T tClcCtrlLevelList[AX_ISP_CLC_MATRIX_SATURAT_SIZE];
  474. AX_ISP_IQ_CLC_CCM_T tClcCcmList[AX_ISP_CLC_MATRIX_SATURAT_SIZE];
  475. } AX_ISP_IQ_CLC_COL_TEMP_PARAM_T;
  476. typedef struct {
  477. AX_U8 nNumCt; /* Accuracy: U8 Range: [0, AX_ISP_CLC_MATRIX_COLOR_TEMP_SIZE] */
  478. AX_ISP_IQ_CLC_COL_TEMP_PARAM_T tColTempParam[AX_ISP_CLC_MATRIX_COLOR_TEMP_SIZE]; /* CLC 3*3 clib Matrix*/
  479. } AX_ISP_IQ_CLC_AUTO_T;
  480. typedef struct {
  481. AX_U32 nColorTemp; /* Accuracy: U32.0 Range: [0, 100000] */
  482. AX_ISP_IQ_CLC_HS_T tClcHs;
  483. AX_ISP_IQ_CLC_CTRL_LEVEL_T tClcCtrlLevel;
  484. AX_ISP_IQ_CLC_CCM_T tClcCcm;
  485. } AX_ISP_IQ_CLC_SPC_PARAM_T;
  486. typedef struct {
  487. AX_U8 nNumSpc; /* Accuracy: U8 Range: [0, AX_ISP_CLC_MATRIX_COLOR_TEMP_SIZE] */
  488. AX_ISP_IQ_CLC_SPC_PARAM_T tSpcParam[AX_ISP_CLC_MATRIX_COLOR_TEMP_SIZE]; /* CLC 3*3 clib Matrix*/
  489. } AX_ISP_IQ_CLC_SPC_T;
  490. typedef struct {
  491. AX_U8 nCLcEn; /* Clc lut enable, Range: [0, 1], 0: Disable, 1: Enable*/
  492. AX_U8 nClcMode; /* mode, Range: [0, 1], 0: basic mode 1: advanced mode*/
  493. AX_U8 nAutoMode; /* for ref auto or manual adjust mode, [0,1], 0: manual, 1:auto, default:1 */
  494. AX_U8 nRefMode; /* choose ref mode, [0,1], 0:use lux as ref, 1:use gain as ref */
  495. AX_U8 nLightSourceMode; /* U8.0 0-16 0: interpolation mode, 1-16 select spc light source*/
  496. AX_U8 nSatHueCtrlLuma[AX_ISP_CLC_LUMA_RATIO_SIZE]; /* u1.7 [0, 128] */
  497. AX_U8 nAlgMode; /* see AX_ISP_IQ_ALG_MODE_E Range: [0, 2] 0: effect priority mode 1: balance mode 2: performance mode */
  498. AX_ISP_IQ_CLC_MANUAL_T tManualParam;
  499. AX_ISP_IQ_CLC_AUTO_T tAutoParam;
  500. AX_ISP_IQ_CLC_SPC_T tSpcLightSource;
  501. } AX_ISP_IQ_CLC_PARAM_T;
  502. /************************************************************************************
  503. * Pfr IQ Param
  504. ************************************************************************************/
  505. #define AX_ISP_PFR_AUTO_SIZE (16)
  506. #define AX_ISP_PFR_MATRIX_H_SIZE (3)
  507. #define AX_ISP_PFR_MATRIX_V_SIZE (3)
  508. #define AX_ISP_PFR_LUMARATIO_SIZE (3)
  509. #define AX_ISP_PFR_LUMALUT_SIZE (8)
  510. #define AX_ISP_PFR_ANGLERATIOLUT_SIZE (16)
  511. #define AX_ISP_PFR_MAX_PATH_SIZE (256)
  512. typedef struct {
  513. AX_U8 nLuxConfidenceLevel; /* Accuracy: u1.7 Range: [0, 128] */
  514. AX_U8 nCctConfidenceLevel; /* Accuracy: u1.7 Range: [0, 128] */
  515. AX_S16 nMaskMatrix[AX_ISP_PFR_MATRIX_V_SIZE][AX_ISP_PFR_MATRIX_H_SIZE]; /* read only Accuracy: S3.8 Range: [-2047, 2047] */
  516. } AX_ISP_IQ_PFR_MANUAL_T;
  517. typedef struct {
  518. AX_U8 nLuxNum; /* Accuracy: U8.0 Range: [0, 16]; */
  519. AX_U8 nCctNum; /* Accuracy: U8.0 Range: [0, 16]; */
  520. AX_U32 nRefLuxOrGain[AX_ISP_PFR_AUTO_SIZE]; /* Accuracy: U22.10 RefMode == 0: Range: [0x000, 0xFFFFFFFF], 1: [0x400, 0xFFFFFFFF]; */
  521. AX_U32 nRefCct[AX_ISP_PFR_AUTO_SIZE]; /* Accuracy: U32.0 Range: [0, 100000] */
  522. AX_U8 nLuxConfidenceLevel[AX_ISP_PFR_AUTO_SIZE]; /* Accuracy: u1.7 Range: [0, 128] */
  523. AX_U8 nCctConfidenceLevel[AX_ISP_PFR_AUTO_SIZE]; /* Accuracy: u1.7 Range: [0, 128] */
  524. } AX_ISP_IQ_PFR_AUTO_T;
  525. typedef struct {
  526. AX_CHAR szWbtModelName[AX_ISP_PFR_MAX_PATH_SIZE]; /* wbt model path, absolute path */
  527. AX_CHAR szModelName[AX_ISP_PFR_MAX_PATH_SIZE]; /* model path, absolute path */
  528. } AX_ISP_NPU_PFR_PARAM_T;
  529. typedef struct {
  530. AX_U8 nPfrEn;
  531. AX_U8 nRefMode; /* choose ref mode, Accuracy: U8.0 Range: [0,1], 0:use lux as ref, 1:use gain as ref */
  532. AX_U8 nProcessMode; /* Accuracy: U8.0 Range: [0, 1, 2], 0: manual, 1:auto, 2: debugmode default:1 */
  533. AX_U8 nDepurpleStrength; /* Accuracy: u1.7 Range: [0, 128] */
  534. AX_U8 nLumaRatio[AX_ISP_PFR_LUMARATIO_SIZE]; /* Accuracy: u1.7 Range: [0, 128] */
  535. AX_U8 nLumaLut[AX_ISP_PFR_LUMALUT_SIZE]; /* Accuracy: u1.7 Range: [0, 128] */
  536. AX_U8 nAngleRatioLut[AX_ISP_PFR_ANGLERATIOLUT_SIZE]; /* Accraucy: u1.7 Range: [0, 128] */
  537. AX_S16 nCcmMatrix[AX_ISP_PFR_MATRIX_V_SIZE][AX_ISP_PFR_MATRIX_H_SIZE]; /* read only Accuracy: S3.8 Range: [-2047, 2047] */
  538. AX_ISP_IQ_PFR_MANUAL_T tManualParam;
  539. AX_ISP_IQ_PFR_AUTO_T tAutoParam;
  540. AX_ISP_NPU_PFR_PARAM_T tNpuPfrParam;
  541. } AX_ISP_IQ_PFR_PARAM_T;
  542. /************************************************************************************
  543. * Gamma IQ Param
  544. ************************************************************************************/
  545. #define AX_ISP_GAMMA_LUT_SIZE (65)
  546. #define AX_ISP_GAMMA_CURVE_MAX_NUM (3)
  547. typedef struct {
  548. AX_U16 nGammaLut[AX_ISP_GAMMA_LUT_SIZE]; /* Accuracy: U8.6 Range: [0, 0x3FFF] */
  549. } AX_ISP_IQ_GAMMA_LUT_T;
  550. typedef struct {
  551. AX_ISP_IQ_GAMMA_LUT_T tGammaLut; /* Gamma lut */
  552. } AX_ISP_IQ_GAMMA_MANUAL_T;
  553. typedef struct {
  554. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_GAMMA_CURVE_MAX_NUM] ,must be 3*/
  555. AX_U32 nRefValStart[AX_ISP_GAMMA_CURVE_MAX_NUM]; /*Ref Gain Start: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF];Ref Lux Start: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  556. AX_U32 nRefValEnd[AX_ISP_GAMMA_CURVE_MAX_NUM]; /*Ref Gain End: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF];Ref Lux End: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  557. AX_ISP_IQ_GAMMA_LUT_T tGammaLut[AX_ISP_GAMMA_CURVE_MAX_NUM]; /* Gamma lut */
  558. } AX_ISP_IQ_GAMMA_AUTO_T;
  559. typedef struct {
  560. AX_U8 nGammaEn; /* Gamma module enable, Range: [0, 1], 0: Disable, 1: Enable*/
  561. AX_U8 nAutoMode; /* for ref auto or manual adjust mode, [0,1], 0: manual, 1:auto, default:0 */
  562. AX_U8 nRefMode; /* choose ref mode, [0,1], 0:use lux as ref, 1:use gain as ref */
  563. AX_U8 nLutMode; /* mode, Range: [0, 1], 0: linear, 1: exponential, default:0*/
  564. AX_ISP_IQ_GAMMA_MANUAL_T tManualParam;
  565. AX_ISP_IQ_GAMMA_AUTO_T tAutoParam;
  566. } AX_ISP_IQ_GAMMA_PARAM_T;
  567. /************************************************************************************
  568. * CSC IQ Param
  569. ************************************************************************************/
  570. #define AX_ISP_YUV_CSC0_MATRIX_SIZE (3)
  571. #define AX_ISP_YUV_CSC0_DECIMATION_NUM (7)
  572. typedef struct {
  573. AX_S16 nMatrix[AX_ISP_YUV_CSC0_MATRIX_SIZE][AX_ISP_YUV_CSC0_MATRIX_SIZE]; /* color matrix. Accuracy: S1.8 Range: [-512, 511] */
  574. AX_S8 nDeciH[AX_ISP_YUV_CSC0_DECIMATION_NUM]; /* horizontal decimation filter, nDeciH[0] + ... nDeciH[6] = 32. Accuracy: S1.5 Range: [-64, 63] */
  575. AX_U8 nUvSeqSel; /* U/V sequence select. Accuracy: U1 Range: [0, 1] */
  576. } AX_ISP_IQ_YUV_CSC0_PARAM_T;
  577. typedef struct {
  578. AX_U8 nDeciV0; /* vertical decimation filter, nDeciV0 + nDeciV1 = 2. Accuracy: U1.1 Range: [0, 2] */
  579. AX_U8 nDeciV1; /* vertical decimation filter, nDeciV0 + nDeciV1 = 2. Accuracy: U1.1 Range: [0, 2] */
  580. } AX_ISP_IQ_YUV_CSC1_PARAM_T;
  581. /************************************************************************************
  582. * Sharpen IQ Param
  583. ************************************************************************************/
  584. #define AX_ISP_SHP_LIMIT_SIZE (2)
  585. #define AX_ISP_SHP_OS_LIMIT_SIZE (2)
  586. #define AX_ISP_SHP_GAIN_SIZE (2)
  587. #define AX_ISP_SHP_HPF_LUT_SIZE_H (3)
  588. #define AX_ISP_SHP_HPF_LUT_SIZE_V (3)
  589. typedef struct {
  590. AX_U8 nSlope; /* sharpen edge slop. Accuracy: U1.7 Range: [0, 128] */
  591. AX_S8 nOffset; /* sharpen edge offset. Accuracy: S1.6 Range: [-128, 127] */
  592. AX_U8 nLimit; /* sharpen edge limit. Accuracy: U0.8 Range: [0, 255] */
  593. } AX_ISP_IQ_SHP_ED_T;
  594. typedef struct {
  595. AX_U8 nShpGain[AX_ISP_SHP_GAIN_SIZE]; /* sharpen gain. Accuracy: U4.4 Range: [0, 255] */
  596. AX_S16 nShpLimit[AX_ISP_SHP_LIMIT_SIZE]; /* sharpen limit. Accuracy: S8.2 Range: [-1024, 1023] */
  597. AX_S8 nShpOsLimit[AX_ISP_SHP_OS_LIMIT_SIZE]; /* sharpen over shot limit. Accuracy: S5.2 Range: [-128, 127] */
  598. AX_U8 nShpOsGain; /* sharpen over shot gain. Accuracy: U1.3 Range: [0, 8] */
  599. } AX_ISP_IQ_SHP_GAIN_T;
  600. typedef struct {
  601. AX_S16 nShpHpfLut[AX_ISP_SHP_HPF_LUT_SIZE_H][AX_ISP_SHP_HPF_LUT_SIZE_V]; /* high pass filter lut. Accuracy: S1.8 Range: [-512, 511] */
  602. } AX_ISP_IQ_SHP_HPF_LUT;
  603. typedef struct {
  604. AX_U8 nShpCoring; /* sharp coring. Accuracy: U4.4 Range: [0, 255] */
  605. AX_ISP_IQ_SHP_ED_T tShpEd;
  606. AX_ISP_IQ_SHP_GAIN_T tGain;
  607. AX_ISP_IQ_SHP_HPF_LUT tHpfLut;
  608. } AX_ISP_IQ_SHARPEN_MANUAL_T;
  609. typedef struct {
  610. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  611. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  612. AX_U8 nShpCoring[AX_ISP_AUTO_TABLE_MAX_NUM]; /* sharp coring. Accuracy: U4.4 Range: [0, 255] */
  613. AX_ISP_IQ_SHP_ED_T tShpEd[AX_ISP_AUTO_TABLE_MAX_NUM];
  614. AX_ISP_IQ_SHP_GAIN_T tGain[AX_ISP_AUTO_TABLE_MAX_NUM];
  615. AX_ISP_IQ_SHP_HPF_LUT tHpfLut[AX_ISP_AUTO_TABLE_MAX_NUM];
  616. } AX_ISP_IQ_SHARPEN_AUTO_T;
  617. typedef struct {
  618. AX_U8 nShpEn; /* sharpen on-off. Accuracy: U1 Range: [0, 1] */
  619. AX_U8 nAutoMode; /* for lux auto or manual adjust mode. Accuracy: U1 Range: [0, 1] */
  620. AX_U8 nRefMode; /* choose ref mode. Accuracy: U1 Range: [0, 1] */
  621. AX_ISP_IQ_SHARPEN_MANUAL_T tManualParam;
  622. AX_ISP_IQ_SHARPEN_AUTO_T tAutoParam;
  623. } AX_ISP_IQ_SHARPEN_PARAM_T;
  624. /************************************************************************************
  625. * YNR IQ Param: Luma Noise Reduction : YNR + DBPC
  626. ************************************************************************************/
  627. #define AX_ISP_YNR_INV_LUT_SIZE (4)
  628. #define AX_ISP_DBPC_ED_LUT_SIZE (4)
  629. #define AX_ISP_YNR_SF_LUT_SIZE (4)
  630. typedef struct {
  631. AX_U8 nYnrSfLut[AX_ISP_YNR_SF_LUT_SIZE]; /* ynr sf lut. Accuracy: U0.8 Range: [0, 255] */
  632. } AX_ISP_IQ_YNR_SF_LUT_T;
  633. typedef struct {
  634. AX_U16 nYnrInvNrLut[AX_ISP_YNR_INV_LUT_SIZE]; /* ynr 1/noise lut. Accuracy: U1.10 Range: [0, 2047] */
  635. } AX_ISP_IQ_YNR_INV_NOISE_LUT_T;
  636. typedef struct {
  637. AX_U16 nDbpcEdOffsetLut[AX_ISP_DBPC_ED_LUT_SIZE]; /* dbpc edge level offset lut. Accuracy: U8.2 Range: [0, 1023] */
  638. } AX_ISP_IQ_DBPC_ED_LUT_T;
  639. typedef struct {
  640. AX_ISP_IQ_YNR_SF_LUT_T tSfLut;
  641. AX_ISP_IQ_YNR_INV_NOISE_LUT_T tNrLut;
  642. AX_U8 nDbpcEdSlope; /* dbpc edge level coefficient. Accuracy: U4.4 Range: [0, 255] */
  643. AX_ISP_IQ_DBPC_ED_LUT_T tDbpcEdLut;
  644. } AX_ISP_IQ_LUMA_NR_MANUAL_T;
  645. typedef struct {
  646. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  647. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  648. AX_ISP_IQ_YNR_SF_LUT_T tSfLut[AX_ISP_AUTO_TABLE_MAX_NUM];
  649. AX_ISP_IQ_YNR_INV_NOISE_LUT_T tNrLut[AX_ISP_AUTO_TABLE_MAX_NUM];
  650. AX_U8 nDbpcEdSlope[AX_ISP_AUTO_TABLE_MAX_NUM];
  651. AX_ISP_IQ_DBPC_ED_LUT_T tDbpcEdLut[AX_ISP_AUTO_TABLE_MAX_NUM];
  652. } AX_ISP_IQ_LUMA_NR_AUTO_T;
  653. typedef struct {
  654. AX_U8 nYnrEn; /* ynr on-off. Accuracy: U1 Range: [0, 1] */
  655. AX_U8 nDbpcEn; /* dbpc on-off. Accuracy: U1 Range: [0, 1] */
  656. AX_U8 nAutoMode; /* for lux auto or manual adjust mode, [0,1], 0: manual, 1:auto, default:1. Accuracy: U1 Range: [0, 1] */
  657. AX_U8 nRefMode; /* choose ref mode, [0,1], 0:use lux as ref, 1:use gain as ref. Accuracy: U1 Range: [0, 1] */
  658. AX_ISP_IQ_LUMA_NR_MANUAL_T tManualParam;
  659. AX_ISP_IQ_LUMA_NR_AUTO_T tAutoParam;
  660. } AX_ISP_IQ_LUMA_NR_PARAM_T;
  661. /************************************************************************************
  662. * CNR IQ Param: Chroma Noise Reduction : CNR + CCMP
  663. ************************************************************************************/
  664. #define AX_ISP_CNR_INV_LUT_SIZE (4)
  665. #define AX_ISP_CCMP_Y_LUT_SIZE (8)
  666. #define AX_ISP_CCMP_SAT_LUT_SIZE (8)
  667. typedef struct {
  668. AX_U16 nCnrInvNrLut[AX_ISP_CNR_INV_LUT_SIZE]; /* cnr 1/noise lut. Accuracy: U1.10 Range: [0, 2047] */
  669. } AX_ISP_IQ_CNR_INV_NOISE_LUT_T;
  670. typedef struct {
  671. AX_U16 nCcmpYLut[AX_ISP_CCMP_Y_LUT_SIZE]; /* ccmp y lut. Accuracy: U1.9 Range: [0, 1023] */
  672. } AX_ISP_IQ_CCMP_Y_LUT_T;
  673. typedef struct {
  674. AX_U16 nCcmpSatLut[AX_ISP_CCMP_SAT_LUT_SIZE]; /* ccmp sat lut. Accuracy: U1.9 Range: [0, 1023] */
  675. } AX_ISP_IQ_CCMP_SAT_LUT_T;
  676. typedef struct {
  677. AX_U8 nCnrLevel; /* cnr level. Accuracy: U1.4 Range: [0, 16] */
  678. AX_ISP_IQ_CNR_INV_NOISE_LUT_T tCnrLut;
  679. AX_ISP_IQ_CCMP_Y_LUT_T tYLut;
  680. AX_ISP_IQ_CCMP_SAT_LUT_T tSatLut;
  681. } AX_ISP_IQ_CHROMA_NR_MANUAL_T;
  682. typedef struct {
  683. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  684. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  685. AX_U8 nCnrLevel[AX_ISP_AUTO_TABLE_MAX_NUM];
  686. AX_ISP_IQ_CNR_INV_NOISE_LUT_T tCnrLut[AX_ISP_AUTO_TABLE_MAX_NUM];
  687. AX_ISP_IQ_CCMP_Y_LUT_T tYLut[AX_ISP_AUTO_TABLE_MAX_NUM];
  688. AX_ISP_IQ_CCMP_SAT_LUT_T tSatLut[AX_ISP_AUTO_TABLE_MAX_NUM];
  689. } AX_ISP_IQ_CHROMA_NR_AUTO_T;
  690. typedef struct {
  691. AX_U8 nCnrEn; /* cnr on-off. Accuracy: U1 Range: [0, 1] */
  692. AX_U8 nCcmpEn; /* ccmp on-off. Accuracy: U1 Range: [0, 1] */
  693. AX_U8 nAutoMode; /* for lux auto or manual adjust mode, [0,1], 0: manual, 1:auto, default:1. Accuracy: U1 Range: [0, 1] */
  694. AX_U8 nRefMode; /* choose ref mode, [0,1], 0:use lux as ref, 1:use gain as ref. Accuracy: U1 Range: [0, 1] */
  695. AX_ISP_IQ_CHROMA_NR_MANUAL_T tManualParam;
  696. AX_ISP_IQ_CHROMA_NR_AUTO_T tAutoParam;
  697. } AX_ISP_IQ_CHROMA_NR_PARAM_T;
  698. /************************************************************************************
  699. * CSET IQ Param: CHROMA CONTROL
  700. ************************************************************************************/
  701. #define AX_ISP_CSET_COLOR_SIZE (2)
  702. #define AX_ISP_CSET_MASK_CENTER_UV_SIZE (2)
  703. #define AX_ISP_CSET_MASK_SIZE (3)
  704. typedef struct {
  705. AX_S16 nCsetColor[AX_ISP_CSET_COLOR_SIZE]; /* target color. Accuracy: S7.2 Range: [-512, 511] */
  706. } AX_ISP_IQ_CSET_COLOR_T;
  707. typedef struct {
  708. AX_U16 nCsetCenterY; /* color mask center Y. Accuracy: U8.2 Range: [0, 1023] */
  709. AX_S16 nCsetCenterUv[AX_ISP_CSET_MASK_CENTER_UV_SIZE]; /* cset color mask center [0]:U, [1]:V. Accuracy: S7.2 Range: [-512, 511] */
  710. } AX_ISP_IQ_CSET_CENTER_T;
  711. typedef struct {
  712. AX_U16 nSetRadius[AX_ISP_CSET_MASK_SIZE]; /* cset color mask radius [0]:Y, [1]:U, [2]:V. Accuracy: U7.2 Range: [0, 511] */
  713. } AX_ISP_IQ_CSET_RADIUS_T;
  714. typedef struct {
  715. AX_U8 nCsetGrad[AX_ISP_CSET_MASK_SIZE]; /* cset color mask transition gradient. Accuracy: U4 Range: [0, 15] */
  716. } AX_ISP_IQ_CSET_GRAD_T;
  717. typedef struct {
  718. AX_ISP_IQ_CSET_COLOR_T tColor;
  719. AX_ISP_IQ_CSET_CENTER_T tCenter;
  720. AX_ISP_IQ_CSET_RADIUS_T tRadius;
  721. AX_ISP_IQ_CSET_GRAD_T tGrad;
  722. } AX_ISP_IQ_CSET_MANUAL_T;
  723. typedef struct {
  724. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  725. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  726. AX_ISP_IQ_CSET_COLOR_T tColor[AX_ISP_AUTO_TABLE_MAX_NUM];
  727. AX_ISP_IQ_CSET_CENTER_T tCenter[AX_ISP_AUTO_TABLE_MAX_NUM];
  728. AX_ISP_IQ_CSET_RADIUS_T tRadius[AX_ISP_AUTO_TABLE_MAX_NUM];
  729. AX_ISP_IQ_CSET_GRAD_T tGrad[AX_ISP_AUTO_TABLE_MAX_NUM];
  730. } AX_ISP_IQ_CSET_AUTO_T;
  731. typedef struct {
  732. AX_U8 nCsetEn; /* cset on-off. Accuracy: U1 Range: [0, 1] */
  733. AX_U8 nAutoMode; /* for lux auto or manual adjust mode. Accuracy: U1 Range: [0, 1] */
  734. AX_U8 nRefMode; /* choose ref mode. Accuracy: U1 Range: [0, 1] */
  735. AX_U8 nCsetIoFlag; /* cset color mask in/out flag. Accuracy: U1 Range: [0, 1] */
  736. AX_ISP_IQ_CSET_MANUAL_T tManualParam;
  737. AX_ISP_IQ_CSET_AUTO_T tAutoParam;
  738. } AX_ISP_IQ_CSET_PARAM_T;
  739. /************************************************************************************
  740. * YCPROC IQ Param: COLOR PROCESS
  741. ************************************************************************************/
  742. typedef struct {
  743. AX_U16 nBrightness; /* adjust brightness. Accuracy: U6.10 Range: [0, 65535] */
  744. AX_U16 nContrast; /* adjust contrast. Accuracy: U6.10 Range: [0, 65535] */
  745. AX_U16 nSaturation; /* adjust saturation. Accuracy: U4.12 Range: [0, 65535] */
  746. AX_U16 nHue; /* adjust hue. Accuracy: U1.15 Range: [0, 65535] */
  747. } AX_ISP_IQ_YCPROC_MANUAL_T;
  748. typedef struct {
  749. AX_U8 nParamGrpNum; /* Accuracy: U8.0 Range: [0, AX_ISP_AUTO_TABLE_MAX_NUM] */
  750. AX_U32 nRefVal[AX_ISP_AUTO_TABLE_MAX_NUM]; /* Gain: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Lux: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  751. AX_U16 nBrightness[AX_ISP_AUTO_TABLE_MAX_NUM]; /* adjust brightness. Accuracy: U6.10 Range: [0, 65535] */
  752. AX_U16 nContrast[AX_ISP_AUTO_TABLE_MAX_NUM]; /* adjust contrast. Accuracy: U6.10 Range: [0, 65535] */
  753. AX_U16 nSaturation[AX_ISP_AUTO_TABLE_MAX_NUM]; /* adjust saturation. Accuracy: U4.12 Range: [0, 65535] */
  754. AX_U16 nHue[AX_ISP_AUTO_TABLE_MAX_NUM]; /* adjust hue. Accuracy: U1.15 Range: [0, 65535] */
  755. } AX_ISP_IQ_YCPROC_AUTO_T;
  756. typedef struct {
  757. AX_U8 nCprocEn; /* ycproc on-off. Accuracy: U1 Range: [0, 1] */
  758. AX_U8 nAutoMode; /* for lux auto or manual adjust mode. Accuracy: U1 Range: [0, 1] */
  759. AX_U8 nRefMode; /* choose ref mode. Accuracy: U1 Range: [0, 1] */
  760. AX_ISP_IQ_YCPROC_MANUAL_T tManualParam;
  761. AX_ISP_IQ_YCPROC_AUTO_T tAutoParam;
  762. } AX_ISP_IQ_YCPROC_PARAM_T;
  763. /************************************************************************************
  764. * YCRT IQ Param
  765. ************************************************************************************/
  766. #define AX_ISP_YCRT_SIZE (2)
  767. typedef struct {
  768. AX_U8 nYcrtInputRange[AX_ISP_YCRT_SIZE]; /* ycrt matrix. Accuracy: U8.0 Range: [0, 255] */
  769. AX_U8 nYcrtOutputRange[AX_ISP_YCRT_SIZE]; /* ycrt matrix. Accuracy: U8.0 Range: [0, 255] */
  770. } AX_Y_YCRT_RANGE_T;
  771. typedef struct {
  772. AX_U8 nYcrtInputRange[AX_ISP_YCRT_SIZE]; /* ycrt matrix. Accuracy: U8.0 Range: [0, 255] */
  773. AX_U8 nYcrtOutputRange[AX_ISP_YCRT_SIZE]; /* ycrt matrix. Accuracy: U8.0 Range: [0, 255] */
  774. } AX_CBCR_YCRT_RANGE_T;
  775. typedef struct {
  776. AX_U8 nYcrtEn; /* ycrt on-off. Accuracy: U1 Range: [0, 1] */
  777. AX_U8 nClipEn; /* clip. Accuracy: U1 Range: [0, 1] */
  778. AX_U8 nCompressEn; /* compress. Accuracy: U1 Range: [0, 1] */
  779. AX_U16 nYrt[AX_ISP_YCRT_SIZE]; /* Video Default: [4, 1016]; Jpeg Default: [0, 1020]; Accuracy: U8.2 Range: [0, 1020] */
  780. AX_S16 nCrt[AX_ISP_YCRT_SIZE]; /* Video Default: [-508, 504]; Jpeg Default: [-512, 508]; Accuracy: S7.2 Range: [-512, 508] */
  781. AX_Y_YCRT_RANGE_T tYRange;
  782. AX_CBCR_YCRT_RANGE_T tCbCrRange;
  783. } AX_ISP_IQ_YCRT_PARAM_T;
  784. /************************************************************************************
  785. * 3A Stat Config
  786. ************************************************************************************/
  787. typedef struct {
  788. AX_U16 nRoiOffsetH; /* horiOffset, must be even, Accuracy: U13.0, Range: [0, 5132] */
  789. AX_U16 nRoiOffsetV; /* vertOffset, must be even, Accuracy: U13.0, Range: [0, 3984]*/
  790. AX_U16 nRoiRegionNumH; /* must be even, Accuracy: U6.0, Range: [2, 64] */
  791. AX_U16 nRoiRegionNumV; /* Accuracy: U6.0, Range: [1, 48] */
  792. AX_U16 nRoiRegionW; /* regionW, must be even, Accuracy: U10.0, Range: [16, 5132], nRoiOffsetH + (nRoiRegionNumH * nRoiRegionW) <= hsize */
  793. AX_U16 nRoiRegionH; /* regionH, must be even, Accuracy: U10.0, Range: [16, 3984], nRoiOffsetV + (nRoiRegionNumV * nRoiRegionH) <= vsize */
  794. } AX_ISP_IQ_AE_STAT_ROI_T;
  795. typedef struct {
  796. AX_U16 nRoiOffsetH; /* horiOffset, must be even, Accuracy: U13.0, Range: [0, 5132] */
  797. AX_U16 nRoiOffsetV; /* vertOffset, must be even, Accuracy: U13.0, Range: [0, 3984]*/
  798. AX_U16 nRoiRegionNumH; /* Accuracy: U7.0, Range: [1, 72] */
  799. AX_U16 nRoiRegionNumV; /* Accuracy: U6.0, Range: [1, 54] */
  800. AX_U16 nRoiRegionW; /* regionW, must be even, Accuracy: U10.0, Range: [16, 5132], nRoiOffsetH + (nRoiRegionNumH * nRoiRegionW) <= hsize */
  801. AX_U16 nRoiRegionH; /* regionH, must be even, Accuracy: U10.0, Range: [16, 3984], nRoiOffsetV + (nRoiRegionNumV * nRoiRegionH) <= vsize */
  802. } AX_ISP_IQ_AWB_STAT_ROI_T;
  803. typedef struct {
  804. AX_U16 nRThr; /* AE RThr. Accuracy: U8.2 Range: [0, 1023] */
  805. AX_U16 nBThr; /* AE BThr. Accuracy: U8.2 Range: [0, 1023] */
  806. AX_U16 nGrThr; /* AE GrThr. Accuracy: U8.2 Range: [0, 1023] */
  807. AX_U16 nGbThr; /* AE GbThr. Accuracy: U8.2 Range: [0, 1023] */
  808. } AX_ISP_IQ_AE_STAT_THR_T;
  809. typedef struct {
  810. AX_U16 nRThr; /* AWB RThr. Accuracy: U8.6 Range: [0, 16383] */
  811. AX_U16 nBThr; /* AWB BThr. Accuracy: U8.6 Range: [0, 16383] */
  812. AX_U16 nGrThr; /* AWB GrThr. Accuracy: U8.6 Range: [0, 16383] */
  813. AX_U16 nGbThr; /* AWB GbThr. Accuracy: U8.6 Range: [0, 16383] */
  814. } AX_ISP_IQ_AWB_STAT_THR_T;
  815. /************************************************************************************
  816. * AE Stat Config
  817. ************************************************************************************/
  818. #define DEF_AE_HIST_STAT_ROI_MAX_NUM (2)
  819. typedef struct {
  820. AX_U16 nRoiOffsetH; /* horiOffset, must be even, Accuracy: U13.0, Range: [0, 5132] */
  821. AX_U16 nRoiOffsetV; /* vertOffset, must be even, Accuracy: U12.0, Range: [0, 3984] */
  822. AX_U16 nRoiWidth; /* RoiWidth, Accuracy: U12.0, Range: [0, 5132], nRoiOffsetH + nRoiWidth <= hsize */
  823. AX_U16 nRoiHeight; /* RoiHeight, Accuracy: U12.0, Range: [0, 3984], nRoiOffsetV + nRoiHeight <= vsize */
  824. } AX_ISP_IQ_AE_HIST_ROI_T;
  825. typedef struct {
  826. AX_U8 nEnable; /* AE Enable. Accuracy: U1.0 Range: [0, 1] */
  827. AX_ISP_IQ_AE_STAT_ROI_T tGridRoi;
  828. AX_ISP_IQ_AE_STAT_THR_T tSatThr;
  829. AX_ISP_IQ_AE_HIST_ROI_T tHistRoi[DEF_AE_HIST_STAT_ROI_MAX_NUM];
  830. } AX_ISP_IQ_AE_STAT_PARAM_T;
  831. /************************************************************************************
  832. * AE Stat Info
  833. ************************************************************************************/
  834. /* AE Grid & Hist */
  835. #define AX_AE_GRID_ROW (48)
  836. #define AX_AE_GRID_COL (64)
  837. #define AX_AE_GRID_CHN (4)
  838. #define AX_AE_HIST_LOG_BIN (16)
  839. #define AX_AE_HIST_LINEAR_BIN (256)
  840. #define AX_AE_HIST_CHN (4)
  841. typedef struct {
  842. AX_U32 nBin[AX_AE_HIST_CHN];
  843. } AX_AE_HIST_BIN_T;
  844. typedef struct {
  845. AX_U8 nValid;
  846. AX_AE_HIST_BIN_T nLinearHist[ AX_AE_HIST_LINEAR_BIN];
  847. AX_AE_HIST_BIN_T nLogHist[AX_AE_HIST_LOG_BIN];
  848. } AX_AE_HIST_STAT_T;
  849. typedef struct {
  850. AX_U32 nGridSum[AX_AE_GRID_CHN];
  851. AX_U16 nGridNum[AX_AE_GRID_CHN];
  852. } AX_AE_GRID_STATS;
  853. typedef struct {
  854. AX_U8 nValid;
  855. AX_U8 nZoneRowSize;
  856. AX_U8 nZoneColSize;
  857. AX_U8 nChnNum;
  858. AX_AE_GRID_STATS tGridStats[AX_AE_GRID_ROW * AX_AE_GRID_COL];
  859. } AX_AE_GRID_STAT_T;
  860. typedef struct {
  861. AX_U32 nSeqNum; /* frame seq num */
  862. AX_U64 nTimestamp; /* frame timestamp */
  863. AX_U32 nSkipNum; /* Algorithm running interval */
  864. AX_AE_GRID_STAT_T tAeGridStat[AX_HDR_CHN_NUM];
  865. AX_AE_HIST_STAT_T tAeHistStat[AX_HDR_CHN_NUM];
  866. } AX_ISP_AE_STAT_INFO_T;
  867. /************************************************************************************
  868. * WB Gain Info
  869. ************************************************************************************/
  870. typedef struct {
  871. AX_U16 nRGain; /* WBC RGain. Accuracy: U4.8 Range: [0, 0xFFF] */
  872. AX_U16 nGrGain; /* WBC RGain. Accuracy: U4.8 Range: [0, 0xFFF] */
  873. AX_U16 nGbGain; /* WBC RGain. Accuracy: U4.8 Range: [0, 0xFFF] */
  874. AX_U16 nBGain; /* WBC RGain. Accuracy: U4.8 Range: [0, 0xFFF] */
  875. } AX_ISP_IQ_WB_GAIN_PARAM_T;
  876. /************************************************************************************
  877. * AWB Stat Config
  878. ************************************************************************************/
  879. typedef struct {
  880. AX_ISP_IQ_AWB_STAT_THR_T tLowThr;
  881. AX_ISP_IQ_AWB_STAT_THR_T tHighThr;
  882. } AX_ISP_IQ_RGB_THR_T;
  883. typedef struct {
  884. AX_U8 nEnable; /* AWB Enable. Accuracy: U1.0 Range: [0, 1] */
  885. AX_ISP_IQ_AWB_STAT_ROI_T tGridRoi;
  886. AX_ISP_IQ_AWB_STAT_THR_T tSatThr;
  887. AX_ISP_IQ_RGB_THR_T tRgbThr;
  888. } AX_ISP_IQ_AWB_STAT_PARAM_T;
  889. /************************************************************************************
  890. * AWB Stat Info
  891. ************************************************************************************/
  892. #define AX_AWB_GRID_ROW (54)
  893. #define AX_AWB_GRID_COL (72)
  894. #define AX_AWB_GRID_CHN (4)
  895. typedef struct {
  896. AX_U32 nUnSatGridSum[AX_AWB_GRID_CHN];
  897. AX_U16 nUnSatGridNum[AX_AWB_GRID_CHN];
  898. AX_U32 nSatGridSum[AX_AWB_GRID_CHN];
  899. AX_U16 nSatGridNum[AX_AWB_GRID_CHN];
  900. } AX_AWB_GRID_STATS;
  901. typedef struct {
  902. AX_U8 nValid;
  903. AX_U8 nZoneRowSize;
  904. AX_U8 nZoneColSize;
  905. AX_AWB_GRID_STATS tAwbGridStats[AX_AWB_GRID_ROW * AX_AWB_GRID_COL];
  906. } AX_AWB_GRID_STATS_INFO_T;
  907. typedef struct {
  908. AX_U32 nSeqNum; /* frame seq num */
  909. AX_U64 nTimestamp; /* frame timestamp */
  910. AX_U32 nSkipNum; /* Algorithm running interval */
  911. AX_AWB_GRID_STATS_INFO_T tAwbGridStats[AX_HDR_CHN_NUM];
  912. } AX_ISP_AWB_STAT_INFO_T;
  913. /************************************************************************************
  914. * AF Stat Config
  915. ************************************************************************************/
  916. #define AX_ISP_AF_GAMMA_LUT_NUM (33)
  917. #define AX_ISP_AF_WEIGHT_LUT_NUM (16)
  918. #define AX_ISP_AF_CORING_LUT_NUM (16)
  919. #define AX_ISP_AF_IIR_COEF_NUM (10)
  920. #define AX_ISP_AF_FIR_COEF_NUM (13)
  921. #define AX_ISP_AF_IIR_REF_LIST_SIZE (32)
  922. typedef struct {
  923. AX_U8 nYSel; /* Accuracy: U1.0, Range: [0, 1], 0:Disable Y, Use Green Channle. 1:Use RGB to Y */
  924. AX_U8 nGrgbSel; /* Accuracy: U1.0, Range: [0, 1], 0: Use Gr, 1:Use Gb */
  925. AX_U16 nCoeffR; /* Accuracy: U0.12, Range: [0, 4095] */
  926. AX_U16 nCoeffG; /* Accuracy: U0.12, Range: [0, 4095] */
  927. AX_U16 nCoeffB; /* Accuracy: U0.12, Range: [0, 4095], nCoeffR + nCoeffG + nCoeffB = 4095*/
  928. } AX_ISP_IQ_AF_BAYER2Y_PARAM_T;
  929. typedef struct {
  930. AX_U8 nGammaEnable; /* Accuracy: U1.0, Range: [0, 1], 0:Disable Gamma, 1:Enable. */
  931. AX_U16 nGammaLut[AX_ISP_AF_GAMMA_LUT_NUM]; /* Accuracy: U8.6, Range: [0, 16383] */
  932. } AX_ISP_IQ_AF_GAMMA_PARAM_T;
  933. typedef struct {
  934. AX_U8 nScaleEnable; /* Accuracy: U1.0, Range: [0, 1], 0:Disable Downsample, 1:Enable Downsample. */
  935. AX_U8 nScaleFactor; /* Accuracy: U3.0, Range: [1, 3], Downsample Ratio. */
  936. AX_U16 nWeightLut[AX_ISP_AF_WEIGHT_LUT_NUM]; /* Accuracy: U0.12, Range: [0, 4095] */
  937. } AX_ISP_IQ_AF_DOWNSCALE_PARAM_T;
  938. typedef struct {
  939. AX_U32 nCoringThr; /* Accuracy: U8.10, Range:[0, 2^18-1], suggest 18 numbers: {2^0, 2^1, ..., 2^17} */
  940. AX_U16 nCoringGain; /* Accuracy: U5.7, Range:[0, 4095] */
  941. AX_U8 nCoringLut[AX_ISP_AF_CORING_LUT_NUM]; /* Accuracy: U5.0, Range[0, 31], nCoringLut[i] <= nCoringLut[i+1] */
  942. } AX_ISP_IQ_AF_CORING_PARAM_T;
  943. typedef struct {
  944. AX_U16 nRoiOffsetH; /* Accuracy: U13.0, Range: [32, 5132], horiOffset, must be even */
  945. AX_U16 nRoiOffsetV; /* Accuracy: U13.0, Range: [16, 3984], vertOffset, must be even */
  946. AX_U16 nRoiRegionNumH; /* Accuracy: U6.0, Range: [1, 21], horiRegionNum, (nRoiRegionNumH * nRoiRegionW) % 4 == 0 */
  947. AX_U16 nRoiRegionNumV; /* Accuracy: U6.0, Range: [1, 64], vertRegionNum, nRoiRegionNumH * nRoiRegionNumV <= 180 */
  948. AX_U16 nRoiRegionW; /* Accuracy: U10.0, Range: [1, 5131], nRoiOffsetH + nRoiRegionNumH * nRoiRegionW <= hsize*/
  949. AX_U16 nRoiRegionH; /* Accuracy: U10.0, Range: [1, 3983], nRoiOffsetV + nRoiRegionNumV * nRoiRegionH <= vsize*/
  950. } AX_ISP_IQ_AF_ROI_PARAM_T;
  951. typedef struct {
  952. AX_U8 nFirEnable; /* Accuracy: U1.0 Range: [0, 1] 0:Disable FIR, 1:Enable FIR */
  953. AX_U32 nViirRefId; /* Accuracy: U6.0, Range:[0, 31] */
  954. AX_U32 nH1IirRefId; /* Accuracy: U6.0, Range:[0, 31] */
  955. AX_U32 nH2IirRefId; /* Accuracy: U6.0, Range:[0, 31]*/
  956. } AX_ISP_IQ_AF_FLT_PARAM_T;
  957. typedef struct {
  958. AX_U8 nAfEnable; /* AF Enable. Accuracy: U1.0 Range: [0, 1] */
  959. AX_ISP_IQ_AF_BAYER2Y_PARAM_T tAfBayer2Y;
  960. AX_ISP_IQ_AF_GAMMA_PARAM_T tAfGamma;
  961. AX_ISP_IQ_AF_DOWNSCALE_PARAM_T tAfScaler;
  962. AX_ISP_IQ_AF_FLT_PARAM_T tAfFilter;
  963. AX_ISP_IQ_AF_CORING_PARAM_T tAfCoring;
  964. AX_ISP_IQ_AF_ROI_PARAM_T tAfRoi;
  965. } AX_ISP_IQ_AF_STAT_PARAM_T;
  966. /* Bandpass Filter for Reference, with the Coefficients and Bandpass Info. */
  967. typedef struct {
  968. AX_U32 nStartFreq; /* Accuracy:U1.20 Range:[1, 0x200000] */
  969. AX_U32 nEndFreq; /* Accuracy:U1.20 Range:[1, 0x200000] */
  970. AX_S32 nIirCoefList[AX_ISP_AF_IIR_COEF_NUM]; /* Accuracy: S2.14, Range:[-65535, 65535]. */
  971. } AX_ISP_IQ_AF_IIR_REF_T;
  972. /* Frequently Used Bandpass Filter List for Reference. */
  973. typedef struct {
  974. AX_U32 nViirRefNum; /* Accuracy: U6.0, Range:[1, 32] */
  975. AX_U32 nH1IirRefNum; /* Accuracy: U6.0, Range:[1, 32] */
  976. AX_U32 nH2IirRefNum; /* Accuracy: U6.0, Range:[1, 32] */
  977. AX_ISP_IQ_AF_IIR_REF_T tVIirRefList[AX_ISP_AF_IIR_REF_LIST_SIZE];
  978. AX_ISP_IQ_AF_IIR_REF_T tH1IirRefList[AX_ISP_AF_IIR_REF_LIST_SIZE];
  979. AX_ISP_IQ_AF_IIR_REF_T tH2IirRefList[AX_ISP_AF_IIR_REF_LIST_SIZE];
  980. } AX_ISP_IQ_AF_IIR_REF_LIST_T;
  981. /************************************************************************************
  982. * AF Stat Info
  983. ************************************************************************************/
  984. #define AX_AF_ROI_OUTPUT_LINES (180)
  985. #define AX_AF_ROI_OUTPUT_LINE_BYTES (16)
  986. typedef struct {
  987. AX_U32 nPixCount;
  988. AX_U64 nPixSum;
  989. AX_U64 nSharpness;
  990. } AX_ISP_AF_GRID_STATS;
  991. typedef struct {
  992. AX_U8 nValid;
  993. AX_U8 nZoneRowSize;
  994. AX_U8 nZoneColSize;
  995. AX_U16 nOffsetH;
  996. AX_U16 nOffsetV;
  997. AX_U16 nGridWidth;
  998. AX_U16 nGridHeight;
  999. AX_ISP_AF_GRID_STATS tAfRoiV[AX_AF_ROI_OUTPUT_LINES];
  1000. AX_ISP_AF_GRID_STATS tAfRoiH1[AX_AF_ROI_OUTPUT_LINES];
  1001. AX_ISP_AF_GRID_STATS tAfRoiH2[AX_AF_ROI_OUTPUT_LINES];
  1002. } AX_ISP_AF_STATS;
  1003. typedef struct {
  1004. AX_U32 nSeqNum;
  1005. AX_ISP_AF_STATS tAfStats[AX_HDR_CHN_NUM];
  1006. } AX_ISP_AF_STAT_INFO_T;
  1007. /************************************************************************************
  1008. * NPU IQ Param
  1009. ************************************************************************************/
  1010. #define AX_ISP_MAX_PATH_SIZE (256)
  1011. #define AX_ISP_NPU_ISO_MODEL_MAX_NUM (16)
  1012. #define AX_ISP_NPU_REF_VALUE_MAX_NUM (16)
  1013. #define AX_ISP_NPU_MODEL_MAX_NUM (AX_ISP_NPU_ISO_MODEL_MAX_NUM * 2)
  1014. typedef struct {
  1015. AX_CHAR szWbtModelName[AX_ISP_MAX_PATH_SIZE]; /* wbt model path, absolute path */
  1016. AX_U8 nHcgMode; /* model param, based on the real param of model. Accuracy: U2 Range: [0, 3] 0:LCG,1:HCG,2:LCG NOT SURPPORT*/
  1017. AX_U32 nIsoThresholdMin; /* Accuracy: U32 Range: [1, 0xFFFFFFFF] <= */
  1018. AX_U32 nIsoThresholdMax; /* Accuracy: U32 Range: [1, 0xFFFFFFFF] > */
  1019. AX_CHAR szModelName[AX_ISP_MAX_PATH_SIZE]; /* model path, relative path */
  1020. AX_U8 n2DLevel; /* selected 2d noise level */
  1021. AX_U8 n3DLevel; /* selected 3d noise level */
  1022. AX_U8 nRefGrpNum; /* Ref Grp Num; Accuacy: U8 Range: [0, AX_ISP_NPU_REF_VALUE_MAX_NUM] */
  1023. AX_U32 nRefValue[AX_ISP_NPU_REF_VALUE_MAX_NUM]; /* Ref Gain End: Accuracy: U22.10 Range: [0x400, 0xFFFFFFFF]; Ref Lux End: Accuracy: U22.10 Range: [0, 0xFFFFFFFF] */
  1024. AX_U8 nSpatialMR[AX_ISP_NPU_REF_VALUE_MAX_NUM]; /* Spatial MR NR Strength, default:128. Accuracy: U1.7 Range: [0 ~ 192] */
  1025. AX_U8 nSpatialBR[AX_ISP_NPU_REF_VALUE_MAX_NUM]; /* Spatial BR NR Strength, default:128. Accuracy: U1.7 Range: [0 ~ 192] */
  1026. AX_U8 nTemporalMR[AX_ISP_NPU_REF_VALUE_MAX_NUM]; /* Temporal MR NR Strength, default:128. Accuracy: U1.7 Range: [1 ~ 256) */
  1027. AX_U8 nTemporalBR[AX_ISP_NPU_REF_VALUE_MAX_NUM]; /* Temporal BR NR Strength, default:64. Accuracy: U1.7 Range: [0 ~ 256) */
  1028. AX_S16 nBiasIn; /* for NR model bias param get/set, default:0. Accuracy: S7.8 Range: [-black_level ~ +black_level] */
  1029. AX_S16 nBiasOut; /* for NR model bias param get/set, default:0. Accuracy: S7.8 Range: [-black_level ~ +black_level] */
  1030. } AX_ISP_NPU_MODEL_PARAM_T;
  1031. typedef struct {
  1032. AX_U8 nAutoModelNum; /* total number of models. Accuracy: U8.0 Range: [0, AX_ISP_NPU_MODEL_MAX_NUM] */
  1033. AX_ISP_NPU_MODEL_PARAM_T tAutoModelTable[AX_ISP_NPU_MODEL_MAX_NUM];
  1034. } AX_ISP_NPU_AUTO_PARAM_T;
  1035. typedef struct {
  1036. AX_CHAR szWbtModelName[AX_ISP_MAX_PATH_SIZE]; /* wbt model path, absolute path */
  1037. AX_CHAR szModelName[AX_ISP_MAX_PATH_SIZE]; /* model path, relative path */
  1038. AX_U8 n2DLevel; /* selected 2d noise level */
  1039. AX_U8 n3DLevel; /* selected 3d noise level */
  1040. AX_U8 nSpatialMR; /* Spatial MR NR Strength, default:128. Accuracy: U1.7 Range: [0 ~ 192] */
  1041. AX_U8 nSpatialBR; /* Spatial BR NR Strength, default:128. Accuracy: U1.7 Range: [0 ~ 192] */
  1042. AX_U8 nTemporalMR; /* Temporal MR NR Strength, default:128. Accuracy: U1.7 Range: [1 ~ 256) */
  1043. AX_U8 nTemporalBR; /* Temporal BR NR Strength, default:64. Accuracy: U1.7 Range: [0 ~ 256) */
  1044. AX_S16 nBiasIn; /* for NR model bias param get/set, default:0. Accuracy: S7.8 Range: [-black_level ~ +black_level] */
  1045. AX_S16 nBiasOut; /* for NR model bias param get/set, default:0. Accuracy: S7.8 Range: [-black_level ~ +black_level] */
  1046. } AX_ISP_NPU_MANUAL_PARAM_T;
  1047. typedef struct {
  1048. AX_U8 nDummyModelNum; /* total number of models. Accuracy: U8.0 Range: [0, AX_ISP_NPU_MODEL_MAX_NUM] */
  1049. AX_ISP_NPU_MODEL_PARAM_T tDummyModelTable[AX_ISP_NPU_MODEL_MAX_NUM];
  1050. } AX_ISP_NPU_DUMMY_PARAM_T;
  1051. typedef struct {
  1052. AX_U8 bNrEnable; /* for NR mode, 0: dummy mode, 1:nr mode, default:1. Accuracy: U1 Range: [0, 1] */
  1053. AX_U8 bAutoMode; /* for NR auto or manual adjust mode, 0: manual, 1:auto, default:1. Accuracy: U1 Range: [0, 1] */
  1054. AX_U8 bUpdateTable; /* for NR model table switch enable mode, 0: disable, 1:enable, default:0. Accuracy: U1 Range: [0, 1] */
  1055. AX_U8 nHdrMode; /* for NR model hdr mode get/set, 1: sdr, 2:hdr_2x, 3:hdr_3x, default:1. Accuracy: U2 Range: [1, 2, 3] */
  1056. AX_U8 bRefMode; /* choose ref mode, Range: [0, 1], 0:use lux as ref, 1:use gain as ref */
  1057. AX_ISP_NPU_DUMMY_PARAM_T tDummyParam; /* for NR dummy mode, just be setting when bUpdateTable = 1 */
  1058. AX_ISP_NPU_MANUAL_PARAM_T tManualParam; /* manual model, must be one of the tModelTable model */
  1059. AX_ISP_NPU_AUTO_PARAM_T tAutoParam; /* auto mode param, just be setting when bUpdateTable = 1 */
  1060. } AX_ISP_IQ_NPU_PARAM_T;
  1061. typedef struct {
  1062. AX_CHAR szWbtModelName[AX_ISP_MAX_PATH_SIZE]; /* wbt model path, absolute path */
  1063. AX_CHAR szModelName[AX_ISP_MAX_PATH_SIZE]; /* model path, absolute path */
  1064. } AX_ISP_NPU_EIS_PARAM_T;
  1065. typedef struct {
  1066. AX_U8 bEisEnable; /* for EIS mode enable, 0: disable, 1:enable, default:0. Accuracy: U1 Range: [0, 1] */
  1067. AX_U8 nEisDelayNum; /* for EIS delay num, defalut 2. Accuracy: U8 Range: [0, 4] */
  1068. AX_U8 nCropRatioH; /* for EIS crop ratio, defalut 0. Accuracy: U0.8 Range: [0, 128) */
  1069. AX_U8 nCropRatioW; /* for EIS crop ratio, defalut 0. Accuracy: U0.8 Range: [0, 128) */
  1070. AX_ISP_NPU_EIS_PARAM_T tEisNpuParam; /* EIS NPU model param */
  1071. } AX_ISP_IQ_EIS_PARAM_T;
  1072. /* Only for RGBIR(Dual Vision) mode */
  1073. #define AX_ISP_NPU_WARP_MAX_NUM (3)
  1074. typedef struct {
  1075. AX_U8 bWarpEnable;
  1076. AX_S32 nWarpParam[AX_ISP_NPU_WARP_MAX_NUM][AX_ISP_NPU_WARP_MAX_NUM];
  1077. } AX_ISP_IQ_NPU_RGBIR_PARAM_T;
  1078. /* Only for RGBIR(Dual Vision) mode */
  1079. #define AX_ISP_NPU_CAP_MAX_NUM (16 * 2)
  1080. typedef struct {
  1081. AX_BOOL bSupportCondLevel;
  1082. AX_BOOL bSupportDyStrength;
  1083. AX_BOOL bSupportBias;
  1084. AX_U8 nCondMinLevel2D; /* 可控降噪模型 2D 力度最小档位 */
  1085. AX_U8 nCondMaxLevel2D; /* 可控降噪模型 2D 力度最大档位 */
  1086. AX_U8 nCondMinLevel3D; /* 可控降噪模型 3D 力度最小档位 */
  1087. AX_U8 nCondMaxLevel3D; /* 可控降噪模型 3D 力度最大档位 */
  1088. AX_S16 nBiasMinValue;
  1089. AX_S16 nBiasMaxValue;
  1090. AX_CHAR szModelName[AX_ISP_MAX_PATH_SIZE];
  1091. } AX_ISP_NPU_CAP_T;
  1092. typedef struct {
  1093. AX_U8 nValidNum;
  1094. AX_ISP_NPU_CAP_T tNpuCapList[AX_ISP_NPU_CAP_MAX_NUM];
  1095. } AX_ISP_IQ_NPU_CAP_TABLE_T;
  1096. /************************************************************************************
  1097. * ISP IQ API
  1098. ************************************************************************************/
  1099. AX_S32 AX_ISP_IQ_SetBlcParam(AX_U8 pipe, AX_ISP_IQ_BLC_PARAM_T *pIspBlcParam);
  1100. AX_S32 AX_ISP_IQ_GetBlcParam(AX_U8 pipe, AX_ISP_IQ_BLC_PARAM_T *pIspBlcParam);
  1101. AX_S32 AX_ISP_IQ_SetFpnParam(AX_U8 pipe, AX_ISP_IQ_FPN_PARAM_T *pIspFpnParam);
  1102. AX_S32 AX_ISP_IQ_GetFpnParam(AX_U8 pipe, AX_ISP_IQ_FPN_PARAM_T *pIspFpnParam);
  1103. AX_S32 AX_ISP_IQ_SetGblParam(AX_U8 pipe, AX_ISP_IQ_GBL_PARAM_T *pIspGblParam);
  1104. AX_S32 AX_ISP_IQ_GetGblParam(AX_U8 pipe, AX_ISP_IQ_GBL_PARAM_T *pIspGblParam);
  1105. AX_S32 AX_ISP_IQ_SetDarkShadingParam(AX_U8 pipe, AX_ISP_IQ_DS_PARAM_T *pIspDsParam);
  1106. AX_S32 AX_ISP_IQ_GetDarkShadingParam(AX_U8 pipe, AX_ISP_IQ_DS_PARAM_T *pIspDsParam);
  1107. AX_S32 AX_ISP_IQ_SetDpcParam(AX_U8 pipe, AX_ISP_IQ_DPC_PARAM_T *pIspDpcParam);
  1108. AX_S32 AX_ISP_IQ_GetDpcParam(AX_U8 pipe, AX_ISP_IQ_DPC_PARAM_T *pIspDpcParam);
  1109. AX_S32 AX_ISP_IQ_SetWnrParam(AX_U8 pipe, AX_ISP_IQ_WNR_PARAM_T *pIspWnrParam);
  1110. AX_S32 AX_ISP_IQ_GetWnrParam(AX_U8 pipe, AX_ISP_IQ_WNR_PARAM_T *pIspWnrParam);
  1111. AX_S32 AX_ISP_IQ_SetCacParam(AX_U8 pipe, AX_ISP_IQ_CAC_PARAM_T *pIspCacParam);
  1112. AX_S32 AX_ISP_IQ_GetCacParam(AX_U8 pipe, AX_ISP_IQ_CAC_PARAM_T *pIspCacParam);
  1113. AX_S32 AX_ISP_IQ_SetLscParam(AX_U8 pipe, AX_ISP_IQ_LSC_PARAM_T *pIspLscParam);
  1114. AX_S32 AX_ISP_IQ_GetLscParam(AX_U8 pipe, AX_ISP_IQ_LSC_PARAM_T *pIspLscParam);
  1115. AX_S32 AX_ISP_IQ_SetWbGainParam(AX_U8 pipe, AX_ISP_IQ_WB_GAIN_PARAM_T *pIspWbGainParam);
  1116. AX_S32 AX_ISP_IQ_GetWbGainParam(AX_U8 pipe, AX_ISP_IQ_WB_GAIN_PARAM_T *pIspWbGainParam);
  1117. AX_S32 AX_ISP_IQ_SetRltmParam(AX_U8 pipe, AX_ISP_IQ_RLTM_PARAM_T *pIspRltmParam);
  1118. AX_S32 AX_ISP_IQ_GetRltmParam(AX_U8 pipe, AX_ISP_IQ_RLTM_PARAM_T *pIspRltmParam);
  1119. AX_S32 AX_ISP_IQ_SetDehazeParam(AX_U8 pipe, AX_ISP_IQ_DEHAZE_PARAM_T *pIspDehazeParam);
  1120. AX_S32 AX_ISP_IQ_GetDehazeParam(AX_U8 pipe, AX_ISP_IQ_DEHAZE_PARAM_T *pIspDehazeParam);
  1121. AX_S32 AX_ISP_IQ_SetDemosaicParam(AX_U8 pipe, AX_ISP_IQ_DEMOSAIC_PARAM_T *pIspDemosaicParam);
  1122. AX_S32 AX_ISP_IQ_GetDemosaicParam(AX_U8 pipe, AX_ISP_IQ_DEMOSAIC_PARAM_T *pIspDemosaicParam);
  1123. AX_S32 AX_ISP_IQ_SetPfrParam(AX_U8 pipe, AX_ISP_IQ_PFR_PARAM_T *pIspPfrParam);
  1124. AX_S32 AX_ISP_IQ_GetPfrParam(AX_U8 pipe, AX_ISP_IQ_PFR_PARAM_T *pIspPfrParam);
  1125. AX_S32 AX_ISP_IQ_SetClcParam(AX_U8 pipe, AX_ISP_IQ_CLC_PARAM_T *pIspClcParam);
  1126. AX_S32 AX_ISP_IQ_GetClcParam(AX_U8 pipe, AX_ISP_IQ_CLC_PARAM_T *pIspClcParam);
  1127. AX_S32 AX_ISP_IQ_SetGammaParam(AX_U8 pipe, AX_ISP_IQ_GAMMA_PARAM_T *pIspGammaParam);
  1128. AX_S32 AX_ISP_IQ_GetGammaParam(AX_U8 pipe, AX_ISP_IQ_GAMMA_PARAM_T *pIspGammaParam);
  1129. AX_S32 AX_ISP_IQ_SetCsc0Param(AX_U8 pipe, AX_ISP_IQ_YUV_CSC0_PARAM_T *pIspCsc0Param);
  1130. AX_S32 AX_ISP_IQ_GetCsc0Param(AX_U8 pipe, AX_ISP_IQ_YUV_CSC0_PARAM_T *pIspCsc0Param);
  1131. AX_S32 AX_ISP_IQ_SetCsc1Param(AX_U8 pipe, AX_ISP_IQ_YUV_CSC1_PARAM_T *pIspCsc1Param);
  1132. AX_S32 AX_ISP_IQ_GetCsc1Param(AX_U8 pipe, AX_ISP_IQ_YUV_CSC1_PARAM_T *pIspCsc1Param);
  1133. AX_S32 AX_ISP_IQ_SetShpParam(AX_U8 pipe, AX_ISP_IQ_SHARPEN_PARAM_T *pIspShpParam);
  1134. AX_S32 AX_ISP_IQ_GetShpParam(AX_U8 pipe, AX_ISP_IQ_SHARPEN_PARAM_T *pIspShpParam);
  1135. AX_S32 AX_ISP_IQ_SetLumaNrParam(AX_U8 pipe, AX_ISP_IQ_LUMA_NR_PARAM_T *pIspLumaNrParam);
  1136. AX_S32 AX_ISP_IQ_GetLumaNrParam(AX_U8 pipe, AX_ISP_IQ_LUMA_NR_PARAM_T *pIspLumaNrParam);
  1137. AX_S32 AX_ISP_IQ_SetChromaNrParam(AX_U8 pipe, AX_ISP_IQ_CHROMA_NR_PARAM_T *pIspChromaNrParam);
  1138. AX_S32 AX_ISP_IQ_GetChromaNrParam(AX_U8 pipe, AX_ISP_IQ_CHROMA_NR_PARAM_T *pIspChromaNrParam);
  1139. AX_S32 AX_ISP_IQ_SetCsetParam(AX_U8 pipe, AX_ISP_IQ_CSET_PARAM_T *pIspCsetParam);
  1140. AX_S32 AX_ISP_IQ_GetCsetParam(AX_U8 pipe, AX_ISP_IQ_CSET_PARAM_T *pIspCsetParam);
  1141. AX_S32 AX_ISP_IQ_SetYcprocParam(AX_U8 pipe, AX_ISP_IQ_YCPROC_PARAM_T *pIspYcprocParam);
  1142. AX_S32 AX_ISP_IQ_GetYcprocParam(AX_U8 pipe, AX_ISP_IQ_YCPROC_PARAM_T *pIspYcprocParam);
  1143. AX_S32 AX_ISP_IQ_SetYcrtParam(AX_U8 pipe, AX_ISP_IQ_YCRT_PARAM_T *pIspYcrtParam);
  1144. AX_S32 AX_ISP_IQ_GetYcrtParam(AX_U8 pipe, AX_ISP_IQ_YCRT_PARAM_T *pIspYcrtParam);
  1145. AX_S32 AX_ISP_IQ_SetAeStatParam(AX_U8 pipe, AX_ISP_IQ_AE_STAT_PARAM_T *pAeStatParam);
  1146. AX_S32 AX_ISP_IQ_GetAeStatParam(AX_U8 pipe, AX_ISP_IQ_AE_STAT_PARAM_T *pAeStatParam);
  1147. AX_S32 AX_ISP_IQ_SetAwbStatParam(AX_U8 pipe, AX_ISP_IQ_AWB_STAT_PARAM_T *pAwbStatParam);
  1148. AX_S32 AX_ISP_IQ_GetAwbStatParam(AX_U8 pipe, AX_ISP_IQ_AWB_STAT_PARAM_T *pAwbStatParam);
  1149. AX_S32 AX_ISP_IQ_SetAfStatParam(AX_U8 pipe, AX_ISP_IQ_AF_STAT_PARAM_T *pAfStatParam);
  1150. AX_S32 AX_ISP_IQ_GetAfStatParam(AX_U8 pipe, AX_ISP_IQ_AF_STAT_PARAM_T *pAfStatParam);
  1151. AX_S32 AX_ISP_IQ_SetAFIirRefList(AX_U8 pipe, AX_ISP_IQ_AF_IIR_REF_LIST_T *pIirRefList);
  1152. AX_S32 AX_ISP_IQ_GetAFIirRefList(AX_U8 pipe, AX_ISP_IQ_AF_IIR_REF_LIST_T *pIirRefList);
  1153. AX_S32 AX_ISP_IQ_GetAEStatistics(AX_U8 pipe, AX_ISP_AE_STAT_INFO_T *pAeStat);
  1154. AX_S32 AX_ISP_IQ_GetAWB0Statistics(AX_U8 pipe, AX_ISP_AWB_STAT_INFO_T *pAwbStat);
  1155. AX_S32 AX_ISP_IQ_GetAWB1Statistics(AX_U8 pipe, AX_ISP_AWB_STAT_INFO_T *pAwbStat);
  1156. AX_S32 AX_ISP_IQ_GetAFStatistics(AX_U8 pipe, AX_ISP_AF_STAT_INFO_T *pAfStat);
  1157. AX_S32 AX_ISP_IQ_SetNpuParam(AX_U8 pipe, AX_ISP_IQ_NPU_PARAM_T *pIspNpuParam);
  1158. AX_S32 AX_ISP_IQ_GetNpuParam(AX_U8 pipe, AX_ISP_IQ_NPU_PARAM_T *pIspNpuParam);
  1159. AX_S32 AX_ISP_IQ_SetEisParam(AX_U8 pipe, AX_ISP_IQ_EIS_PARAM_T *pIspEisParam);
  1160. AX_S32 AX_ISP_IQ_GetEisParam(AX_U8 pipe, AX_ISP_IQ_EIS_PARAM_T *pIspEisParam);
  1161. AX_S32 AX_ISP_IQ_SetRGBIRParam(AX_U8 pipe, AX_ISP_IQ_NPU_RGBIR_PARAM_T *pIspRgbIRParam);
  1162. AX_S32 AX_ISP_IQ_GetRGBIRParam(AX_U8 pipe, AX_ISP_IQ_NPU_RGBIR_PARAM_T *pIspRgbIRParam);
  1163. AX_S32 AX_ISP_IQ_GetNpuCapability(AX_U8 pipe, AX_ISP_IQ_NPU_CAP_TABLE_T *pIspNpuCapTbl);
  1164. #ifdef __cplusplus
  1165. }
  1166. #endif
  1167. #endif //_AX_ISP_IQ_API_H_