Overview.html 57 KB

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  14. <title>Using as: Overview</title>
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  57. <a name="Overview"></a>
  58. <div class="header">
  59. <p>
  60. Next: <a href="Invoking.html#Invoking" accesskey="n" rel="next">Invoking</a>, Previous: <a href="index.html#Top" accesskey="p" rel="prev">Top</a>, Up: <a href="index.html#Top" accesskey="u" rel="up">Top</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  61. </div>
  62. <hr>
  63. <a name="Overview-1"></a>
  64. <h2 class="chapter">1 Overview</h2>
  65. <a name="index-invocation-summary"></a>
  66. <a name="index-option-summary"></a>
  67. <a name="index-summary-of-options"></a>
  68. <p>Here is a brief summary of how to invoke <code>as</code>. For details,
  69. see <a href="Invoking.html#Invoking">Command-Line Options</a>.
  70. </p>
  71. <div class="smallexample">
  72. <pre class="smallexample">as [<b>-a</b>[<b>cdghlns</b>][=<var>file</var>]] [<b>&ndash;alternate</b>] [<b>-D</b>]
  73. [<b>&ndash;compress-debug-sections</b>] [<b>&ndash;nocompress-debug-sections</b>]
  74. [<b>&ndash;debug-prefix-map</b> <var>old</var>=<var>new</var>]
  75. [<b>&ndash;defsym</b> <var>sym</var>=<var>val</var>] [<b>-f</b>] [<b>-g</b>] [<b>&ndash;gstabs</b>]
  76. [<b>&ndash;gstabs+</b>] [<b>&ndash;gdwarf-2</b>] [<b>&ndash;gdwarf-sections</b>]
  77. [<b>&ndash;help</b>] [<b>-I</b> <var>dir</var>] [<b>-J</b>]
  78. [<b>-K</b>] [<b>-L</b>] [<b>&ndash;listing-lhs-width</b>=<var>NUM</var>]
  79. [<b>&ndash;listing-lhs-width2</b>=<var>NUM</var>] [<b>&ndash;listing-rhs-width</b>=<var>NUM</var>]
  80. [<b>&ndash;listing-cont-lines</b>=<var>NUM</var>] [<b>&ndash;keep-locals</b>]
  81. [<b>&ndash;no-pad-sections</b>]
  82. [<b>-o</b> <var>objfile</var>] [<b>-R</b>]
  83. [<b>&ndash;hash-size</b>=<var>NUM</var>] [<b>&ndash;reduce-memory-overheads</b>]
  84. [<b>&ndash;statistics</b>]
  85. [<b>-v</b>] [<b>-version</b>] [<b>&ndash;version</b>]
  86. [<b>-W</b>] [<b>&ndash;warn</b>] [<b>&ndash;fatal-warnings</b>] [<b>-w</b>] [<b>-x</b>]
  87. [<b>-Z</b>] [<b>@<var>FILE</var></b>]
  88. [<b>&ndash;sectname-subst</b>] [<b>&ndash;size-check=[error|warning]</b>]
  89. [<b>&ndash;elf-stt-common=[no|yes]</b>]
  90. [<b>&ndash;target-help</b>] [<var>target-options</var>]
  91. [<b>&ndash;</b>|<var>files</var> &hellip;]
  92. <em>Target AArch64 options:</em>
  93. [<b>-EB</b>|<b>-EL</b>]
  94. [<b>-mabi</b>=<var>ABI</var>]
  95. <em>Target Alpha options:</em>
  96. [<b>-m<var>cpu</var></b>]
  97. [<b>-mdebug</b> | <b>-no-mdebug</b>]
  98. [<b>-replace</b> | <b>-noreplace</b>]
  99. [<b>-relax</b>] [<b>-g</b>] [<b>-G<var>size</var></b>]
  100. [<b>-F</b>] [<b>-32addr</b>]
  101. <em>Target ARC options:</em>
  102. [<b>-mcpu=<var>cpu</var></b>]
  103. [<b>-mA6</b>|<b>-mARC600</b>|<b>-mARC601</b>|<b>-mA7</b>|<b>-mARC700</b>|<b>-mEM</b>|<b>-mHS</b>]
  104. [<b>-mcode-density</b>]
  105. [<b>-mrelax</b>]
  106. [<b>-EB</b>|<b>-EL</b>]
  107. <em>Target ARM options:</em>
  108. [<b>-mcpu</b>=<var>processor</var>[+<var>extension</var>&hellip;]]
  109. [<b>-march</b>=<var>architecture</var>[+<var>extension</var>&hellip;]]
  110. [<b>-mfpu</b>=<var>floating-point-format</var>]
  111. [<b>-mfloat-abi</b>=<var>abi</var>]
  112. [<b>-meabi</b>=<var>ver</var>]
  113. [<b>-mthumb</b>]
  114. [<b>-EB</b>|<b>-EL</b>]
  115. [<b>-mapcs-32</b>|<b>-mapcs-26</b>|<b>-mapcs-float</b>|
  116. <b>-mapcs-reentrant</b>]
  117. [<b>-mthumb-interwork</b>] [<b>-k</b>]
  118. <em>Target Blackfin options:</em>
  119. [<b>-mcpu</b>=<var>processor</var>[-<var>sirevision</var>]]
  120. [<b>-mfdpic</b>]
  121. [<b>-mno-fdpic</b>]
  122. [<b>-mnopic</b>]
  123. <em>Target CRIS options:</em>
  124. [<b>&ndash;underscore</b> | <b>&ndash;no-underscore</b>]
  125. [<b>&ndash;pic</b>] [<b>-N</b>]
  126. [<b>&ndash;emulation=criself</b> | <b>&ndash;emulation=crisaout</b>]
  127. [<b>&ndash;march=v0_v10</b> | <b>&ndash;march=v10</b> | <b>&ndash;march=v32</b> | <b>&ndash;march=common_v10_v32</b>]
  128. <em>Target D10V options:</em>
  129. [<b>-O</b>]
  130. <em>Target D30V options:</em>
  131. [<b>-O</b>|<b>-n</b>|<b>-N</b>]
  132. <em>Target EPIPHANY options:</em>
  133. [<b>-mepiphany</b>|<b>-mepiphany16</b>]
  134. <em>Target H8/300 options:</em>
  135. [-h-tick-hex]
  136. <em>Target i386 options:</em>
  137. [<b>&ndash;32</b>|<b>&ndash;x32</b>|<b>&ndash;64</b>] [<b>-n</b>]
  138. [<b>-march</b>=<var>CPU</var>[+<var>EXTENSION</var>&hellip;]] [<b>-mtune</b>=<var>CPU</var>]
  139. <em>Target i960 options:</em>
  140. [<b>-ACA</b>|<b>-ACA_A</b>|<b>-ACB</b>|<b>-ACC</b>|<b>-AKA</b>|<b>-AKB</b>|
  141. <b>-AKC</b>|<b>-AMC</b>]
  142. [<b>-b</b>] [<b>-no-relax</b>]
  143. <em>Target IA-64 options:</em>
  144. [<b>-mconstant-gp</b>|<b>-mauto-pic</b>]
  145. [<b>-milp32</b>|<b>-milp64</b>|<b>-mlp64</b>|<b>-mp64</b>]
  146. [<b>-mle</b>|<b>mbe</b>]
  147. [<b>-mtune=itanium1</b>|<b>-mtune=itanium2</b>]
  148. [<b>-munwind-check=warning</b>|<b>-munwind-check=error</b>]
  149. [<b>-mhint.b=ok</b>|<b>-mhint.b=warning</b>|<b>-mhint.b=error</b>]
  150. [<b>-x</b>|<b>-xexplicit</b>] [<b>-xauto</b>] [<b>-xdebug</b>]
  151. <em>Target IP2K options:</em>
  152. [<b>-mip2022</b>|<b>-mip2022ext</b>]
  153. <em>Target M32C options:</em>
  154. [<b>-m32c</b>|<b>-m16c</b>] [-relax] [-h-tick-hex]
  155. <em>Target M32R options:</em>
  156. [<b>&ndash;m32rx</b>|<b>&ndash;[no-]warn-explicit-parallel-conflicts</b>|
  157. <b>&ndash;W[n]p</b>]
  158. <em>Target M680X0 options:</em>
  159. [<b>-l</b>] [<b>-m68000</b>|<b>-m68010</b>|<b>-m68020</b>|&hellip;]
  160. <em>Target M68HC11 options:</em>
  161. [<b>-m68hc11</b>|<b>-m68hc12</b>|<b>-m68hcs12</b>|<b>-mm9s12x</b>|<b>-mm9s12xg</b>]
  162. [<b>-mshort</b>|<b>-mlong</b>]
  163. [<b>-mshort-double</b>|<b>-mlong-double</b>]
  164. [<b>&ndash;force-long-branches</b>] [<b>&ndash;short-branches</b>]
  165. [<b>&ndash;strict-direct-mode</b>] [<b>&ndash;print-insn-syntax</b>]
  166. [<b>&ndash;print-opcodes</b>] [<b>&ndash;generate-example</b>]
  167. <em>Target MCORE options:</em>
  168. [<b>-jsri2bsr</b>] [<b>-sifilter</b>] [<b>-relax</b>]
  169. [<b>-mcpu=[210|340]</b>]
  170. <em>Target Meta options:</em>
  171. [<b>-mcpu=<var>cpu</var></b>] [<b>-mfpu=<var>cpu</var></b>] [<b>-mdsp=<var>cpu</var></b>]
  172. <em>Target MICROBLAZE options:</em>
  173. <em>Target MIPS options:</em>
  174. [<b>-nocpp</b>] [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>[<var>optimization level</var>]]
  175. [<b>-g</b>[<var>debug level</var>]] [<b>-G</b> <var>num</var>] [<b>-KPIC</b>] [<b>-call_shared</b>]
  176. [<b>-non_shared</b>] [<b>-xgot</b> [<b>-mvxworks-pic</b>]
  177. [<b>-mabi</b>=<var>ABI</var>] [<b>-32</b>] [<b>-n32</b>] [<b>-64</b>] [<b>-mfp32</b>] [<b>-mgp32</b>]
  178. [<b>-mfp64</b>] [<b>-mgp64</b>] [<b>-mfpxx</b>]
  179. [<b>-modd-spreg</b>] [<b>-mno-odd-spreg</b>]
  180. [<b>-march</b>=<var>CPU</var>] [<b>-mtune</b>=<var>CPU</var>] [<b>-mips1</b>] [<b>-mips2</b>]
  181. [<b>-mips3</b>] [<b>-mips4</b>] [<b>-mips5</b>] [<b>-mips32</b>] [<b>-mips32r2</b>]
  182. [<b>-mips32r3</b>] [<b>-mips32r5</b>] [<b>-mips32r6</b>] [<b>-mips64</b>] [<b>-mips64r2</b>]
  183. [<b>-mips64r3</b>] [<b>-mips64r5</b>] [<b>-mips64r6</b>]
  184. [<b>-construct-floats</b>] [<b>-no-construct-floats</b>]
  185. [<b>-mignore-branch-isa</b>] [<b>-mno-ignore-branch-isa</b>]
  186. [<b>-mnan=<var>encoding</var></b>]
  187. [<b>-trap</b>] [<b>-no-break</b>] [<b>-break</b>] [<b>-no-trap</b>]
  188. [<b>-mips16</b>] [<b>-no-mips16</b>]
  189. [<b>-mmicromips</b>] [<b>-mno-micromips</b>]
  190. [<b>-msmartmips</b>] [<b>-mno-smartmips</b>]
  191. [<b>-mips3d</b>] [<b>-no-mips3d</b>]
  192. [<b>-mdmx</b>] [<b>-no-mdmx</b>]
  193. [<b>-mdsp</b>] [<b>-mno-dsp</b>]
  194. [<b>-mdspr2</b>] [<b>-mno-dspr2</b>]
  195. [<b>-mdspr3</b>] [<b>-mno-dspr3</b>]
  196. [<b>-mmsa</b>] [<b>-mno-msa</b>]
  197. [<b>-mxpa</b>] [<b>-mno-xpa</b>]
  198. [<b>-mmt</b>] [<b>-mno-mt</b>]
  199. [<b>-mmcu</b>] [<b>-mno-mcu</b>]
  200. [<b>-minsn32</b>] [<b>-mno-insn32</b>]
  201. [<b>-mfix7000</b>] [<b>-mno-fix7000</b>]
  202. [<b>-mfix-rm7000</b>] [<b>-mno-fix-rm7000</b>]
  203. [<b>-mfix-vr4120</b>] [<b>-mno-fix-vr4120</b>]
  204. [<b>-mfix-vr4130</b>] [<b>-mno-fix-vr4130</b>]
  205. [<b>-mdebug</b>] [<b>-no-mdebug</b>]
  206. [<b>-mpdr</b>] [<b>-mno-pdr</b>]
  207. <em>Target MMIX options:</em>
  208. [<b>&ndash;fixed-special-register-names</b>] [<b>&ndash;globalize-symbols</b>]
  209. [<b>&ndash;gnu-syntax</b>] [<b>&ndash;relax</b>] [<b>&ndash;no-predefined-symbols</b>]
  210. [<b>&ndash;no-expand</b>] [<b>&ndash;no-merge-gregs</b>] [<b>-x</b>]
  211. [<b>&ndash;linker-allocated-gregs</b>]
  212. <em>Target Nios II options:</em>
  213. [<b>-relax-all</b>] [<b>-relax-section</b>] [<b>-no-relax</b>]
  214. [<b>-EB</b>] [<b>-EL</b>]
  215. <em>Target NDS32 options:</em>
  216. [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>] [<b>-Os</b>] [<b>-mcpu=<var>cpu</var></b>]
  217. [<b>-misa=<var>isa</var></b>] [<b>-mabi=<var>abi</var></b>] [<b>-mall-ext</b>]
  218. [<b>-m[no-]16-bit</b>] [<b>-m[no-]perf-ext</b>] [<b>-m[no-]perf2-ext</b>]
  219. [<b>-m[no-]string-ext</b>] [<b>-m[no-]dsp-ext</b>] [<b>-m[no-]mac</b>] [<b>-m[no-]div</b>]
  220. [<b>-m[no-]audio-isa-ext</b>] [<b>-m[no-]fpu-sp-ext</b>] [<b>-m[no-]fpu-dp-ext</b>]
  221. [<b>-m[no-]fpu-fma</b>] [<b>-mfpu-freg=<var>FREG</var></b>] [<b>-mreduced-regs</b>]
  222. [<b>-mfull-regs</b>] [<b>-m[no-]dx-regs</b>] [<b>-mpic</b>] [<b>-mno-relax</b>]
  223. [<b>-mb2bb</b>]
  224. <em>Target PDP11 options:</em>
  225. [<b>-mpic</b>|<b>-mno-pic</b>] [<b>-mall</b>] [<b>-mno-extensions</b>]
  226. [<b>-m</b><var>extension</var>|<b>-mno-</b><var>extension</var>]
  227. [<b>-m</b><var>cpu</var>] [<b>-m</b><var>machine</var>]
  228. <em>Target picoJava options:</em>
  229. [<b>-mb</b>|<b>-me</b>]
  230. <em>Target PowerPC options:</em>
  231. [<b>-a32</b>|<b>-a64</b>]
  232. [<b>-mpwrx</b>|<b>-mpwr2</b>|<b>-mpwr</b>|<b>-m601</b>|<b>-mppc</b>|<b>-mppc32</b>|<b>-m603</b>|<b>-m604</b>|<b>-m403</b>|<b>-m405</b>|
  233. <b>-m440</b>|<b>-m464</b>|<b>-m476</b>|<b>-m7400</b>|<b>-m7410</b>|<b>-m7450</b>|<b>-m7455</b>|<b>-m750cl</b>|<b>-mppc64</b>|
  234. <b>-m620</b>|<b>-me500</b>|<b>-e500x2</b>|<b>-me500mc</b>|<b>-me500mc64</b>|<b>-me5500</b>|<b>-me6500</b>|<b>-mppc64bridge</b>|
  235. <b>-mbooke</b>|<b>-mpower4</b>|<b>-mpwr4</b>|<b>-mpower5</b>|<b>-mpwr5</b>|<b>-mpwr5x</b>|<b>-mpower6</b>|<b>-mpwr6</b>|
  236. <b>-mpower7</b>|<b>-mpwr7</b>|<b>-mpower8</b>|<b>-mpwr8</b>|<b>-mpower9</b>|<b>-mpwr9</b><b>-ma2</b>|
  237. <b>-mcell</b>|<b>-mspe</b>|<b>-mtitan</b>|<b>-me300</b>|<b>-mcom</b>]
  238. [<b>-many</b>] [<b>-maltivec</b>|<b>-mvsx</b>|<b>-mhtm</b>|<b>-mvle</b>]
  239. [<b>-mregnames</b>|<b>-mno-regnames</b>]
  240. [<b>-mrelocatable</b>|<b>-mrelocatable-lib</b>|<b>-K PIC</b>] [<b>-memb</b>]
  241. [<b>-mlittle</b>|<b>-mlittle-endian</b>|<b>-le</b>|<b>-mbig</b>|<b>-mbig-endian</b>|<b>-be</b>]
  242. [<b>-msolaris</b>|<b>-mno-solaris</b>]
  243. [<b>-nops=<var>count</var></b>]
  244. <em>Target RL78 options:</em>
  245. [<b>-mg10</b>]
  246. [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>]
  247. <em>Target RX options:</em>
  248. [<b>-mlittle-endian</b>|<b>-mbig-endian</b>]
  249. [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>]
  250. [<b>-muse-conventional-section-names</b>]
  251. [<b>-msmall-data-limit</b>]
  252. [<b>-mpid</b>]
  253. [<b>-mrelax</b>]
  254. [<b>-mint-register=<var>number</var></b>]
  255. [<b>-mgcc-abi</b>|<b>-mrx-abi</b>]
  256. <em>Target RISC-V options:</em>
  257. [<b>-march</b>=<var>ISA</var>]
  258. [<b>-mabi</b>=<var>ABI</var>]
  259. <em>Target s390 options:</em>
  260. [<b>-m31</b>|<b>-m64</b>] [<b>-mesa</b>|<b>-mzarch</b>] [<b>-march</b>=<var>CPU</var>]
  261. [<b>-mregnames</b>|<b>-mno-regnames</b>]
  262. [<b>-mwarn-areg-zero</b>]
  263. <em>Target SCORE options:</em>
  264. [<b>-EB</b>][<b>-EL</b>][<b>-FIXDD</b>][<b>-NWARN</b>]
  265. [<b>-SCORE5</b>][<b>-SCORE5U</b>][<b>-SCORE7</b>][<b>-SCORE3</b>]
  266. [<b>-march=score7</b>][<b>-march=score3</b>]
  267. [<b>-USE_R1</b>][<b>-KPIC</b>][<b>-O0</b>][<b>-G</b> <var>num</var>][<b>-V</b>]
  268. <em>Target SPARC options:</em>
  269. [<b>-Av6</b>|<b>-Av7</b>|<b>-Av8</b>|<b>-Aleon</b>|<b>-Asparclet</b>|<b>-Asparclite</b>
  270. <b>-Av8plus</b>|<b>-Av8plusa</b>|<b>-Av8plusb</b>|<b>-Av8plusc</b>|<b>-Av8plusd</b>
  271. <b>-Av8plusv</b>|<b>-Av8plusm</b>|<b>-Av9</b>|<b>-Av9a</b>|<b>-Av9b</b>|<b>-Av9c</b>
  272. <b>-Av9d</b>|<b>-Av9e</b>|<b>-Av9v</b>|<b>-Av9m</b>|<b>-Asparc</b>|<b>-Asparcvis</b>
  273. <b>-Asparcvis2</b>|<b>-Asparcfmaf</b>|<b>-Asparcima</b>|<b>-Asparcvis3</b>
  274. <b>-Asparcvisr</b>|<b>-Asparc5</b>]
  275. [<b>-xarch=v8plus</b>|<b>-xarch=v8plusa</b>]|<b>-xarch=v8plusb</b>|<b>-xarch=v8plusc</b>
  276. <b>-xarch=v8plusd</b>|<b>-xarch=v8plusv</b>|<b>-xarch=v8plusm</b>|<b>-xarch=v9</b>
  277. <b>-xarch=v9a</b>|<b>-xarch=v9b</b>|<b>-xarch=v9c</b>|<b>-xarch=v9d</b>|<b>-xarch=v9e</b>
  278. <b>-xarch=v9v</b>|<b>-xarch=v9m</b>|<b>-xarch=sparc</b>|<b>-xarch=sparcvis</b>
  279. <b>-xarch=sparcvis2</b>|<b>-xarch=sparcfmaf</b>|<b>-xarch=sparcima</b>
  280. <b>-xarch=sparcvis3</b>|<b>-xarch=sparcvisr</b>|<b>-xarch=sparc5</b>
  281. <b>-bump</b>]
  282. [<b>-32</b>|<b>-64</b>]
  283. [<b>&ndash;enforce-aligned-data</b>][<b>&ndash;dcti-couples-detect</b>]
  284. <em>Target TIC54X options:</em>
  285. [<b>-mcpu=54[123589]</b>|<b>-mcpu=54[56]lp</b>] [<b>-mfar-mode</b>|<b>-mf</b>]
  286. [<b>-merrors-to-file</b> <var>&lt;filename&gt;</var>|<b>-me</b> <var>&lt;filename&gt;</var>]
  287. <em>Target TIC6X options:</em>
  288. [<b>-march=<var>arch</var></b>] [<b>-mbig-endian</b>|<b>-mlittle-endian</b>]
  289. [<b>-mdsbt</b>|<b>-mno-dsbt</b>] [<b>-mpid=no</b>|<b>-mpid=near</b>|<b>-mpid=far</b>]
  290. [<b>-mpic</b>|<b>-mno-pic</b>]
  291. <em>Target TILE-Gx options:</em>
  292. [<b>-m32</b>|<b>-m64</b>][<b>-EB</b>][<b>-EL</b>]
  293. <em>Target Visium options:</em>
  294. [<b>-mtune=<var>arch</var></b>]
  295. <em>Target Xtensa options:</em>
  296. [<b>&ndash;[no-]text-section-literals</b>] [<b>&ndash;[no-]auto-litpools</b>]
  297. [<b>&ndash;[no-]absolute-literals</b>]
  298. [<b>&ndash;[no-]target-align</b>] [<b>&ndash;[no-]longcalls</b>]
  299. [<b>&ndash;[no-]transform</b>]
  300. [<b>&ndash;rename-section</b> <var>oldname</var>=<var>newname</var>]
  301. [<b>&ndash;[no-]trampolines</b>]
  302. <em>Target Z80 options:</em>
  303. [<b>-z80</b>] [<b>-r800</b>]
  304. [<b> -ignore-undocumented-instructions</b>] [<b>-Wnud</b>]
  305. [<b> -ignore-unportable-instructions</b>] [<b>-Wnup</b>]
  306. [<b> -warn-undocumented-instructions</b>] [<b>-Wud</b>]
  307. [<b> -warn-unportable-instructions</b>] [<b>-Wup</b>]
  308. [<b> -forbid-undocumented-instructions</b>] [<b>-Fud</b>]
  309. [<b> -forbid-unportable-instructions</b>] [<b>-Fup</b>]
  310. </pre></div>
  311. <dl compact="compact">
  312. <dt><code>@<var>file</var></code></dt>
  313. <dd><p>Read command-line options from <var>file</var>. The options read are
  314. inserted in place of the original @<var>file</var> option. If <var>file</var>
  315. does not exist, or cannot be read, then the option will be treated
  316. literally, and not removed.
  317. </p>
  318. <p>Options in <var>file</var> are separated by whitespace. A whitespace
  319. character may be included in an option by surrounding the entire
  320. option in either single or double quotes. Any character (including a
  321. backslash) may be included by prefixing the character to be included
  322. with a backslash. The <var>file</var> may itself contain additional
  323. @<var>file</var> options; any such options will be processed recursively.
  324. </p>
  325. </dd>
  326. <dt><code>-a[cdghlmns]</code></dt>
  327. <dd><p>Turn on listings, in any of a variety of ways:
  328. </p>
  329. <dl compact="compact">
  330. <dt><code>-ac</code></dt>
  331. <dd><p>omit false conditionals
  332. </p>
  333. </dd>
  334. <dt><code>-ad</code></dt>
  335. <dd><p>omit debugging directives
  336. </p>
  337. </dd>
  338. <dt><code>-ag</code></dt>
  339. <dd><p>include general information, like as version and options passed
  340. </p>
  341. </dd>
  342. <dt><code>-ah</code></dt>
  343. <dd><p>include high-level source
  344. </p>
  345. </dd>
  346. <dt><code>-al</code></dt>
  347. <dd><p>include assembly
  348. </p>
  349. </dd>
  350. <dt><code>-am</code></dt>
  351. <dd><p>include macro expansions
  352. </p>
  353. </dd>
  354. <dt><code>-an</code></dt>
  355. <dd><p>omit forms processing
  356. </p>
  357. </dd>
  358. <dt><code>-as</code></dt>
  359. <dd><p>include symbols
  360. </p>
  361. </dd>
  362. <dt><code>=file</code></dt>
  363. <dd><p>set the name of the listing file
  364. </p></dd>
  365. </dl>
  366. <p>You may combine these options; for example, use &lsquo;<samp>-aln</samp>&rsquo; for assembly
  367. listing without forms processing. The &lsquo;<samp>=file</samp>&rsquo; option, if used, must be
  368. the last one. By itself, &lsquo;<samp>-a</samp>&rsquo; defaults to &lsquo;<samp>-ahls</samp>&rsquo;.
  369. </p>
  370. </dd>
  371. <dt><code>--alternate</code></dt>
  372. <dd><p>Begin in alternate macro mode.
  373. See <a href="Altmacro.html#Altmacro"><code>.altmacro</code></a>.
  374. </p>
  375. </dd>
  376. <dt><code>--compress-debug-sections</code></dt>
  377. <dd><p>Compress DWARF debug sections using zlib with SHF_COMPRESSED from the
  378. ELF ABI. The resulting object file may not be compatible with older
  379. linkers and object file utilities. Note if compression would make a
  380. given section <em>larger</em> then it is not compressed.
  381. </p>
  382. <a name="index-_002d_002dcompress_002ddebug_002dsections_003d-option"></a>
  383. </dd>
  384. <dt><code>--compress-debug-sections=none</code></dt>
  385. <dt><code>--compress-debug-sections=zlib</code></dt>
  386. <dt><code>--compress-debug-sections=zlib-gnu</code></dt>
  387. <dt><code>--compress-debug-sections=zlib-gabi</code></dt>
  388. <dd><p>These options control how DWARF debug sections are compressed.
  389. <samp>--compress-debug-sections=none</samp> is equivalent to
  390. <samp>--nocompress-debug-sections</samp>.
  391. <samp>--compress-debug-sections=zlib</samp> and
  392. <samp>--compress-debug-sections=zlib-gabi</samp> are equivalent to
  393. <samp>--compress-debug-sections</samp>.
  394. <samp>--compress-debug-sections=zlib-gnu</samp> compresses DWARF debug
  395. sections using zlib. The debug sections are renamed to begin with
  396. &lsquo;<samp>.zdebug</samp>&rsquo;. Note if compression would make a given section
  397. <em>larger</em> then it is not compressed nor renamed.
  398. </p>
  399. </dd>
  400. <dt><code>--nocompress-debug-sections</code></dt>
  401. <dd><p>Do not compress DWARF debug sections. This is usually the default for all
  402. targets except the x86/x86_64, but a configure time option can be used to
  403. override this.
  404. </p>
  405. </dd>
  406. <dt><code>-D</code></dt>
  407. <dd><p>Ignored. This option is accepted for script compatibility with calls to
  408. other assemblers.
  409. </p>
  410. </dd>
  411. <dt><code>--debug-prefix-map <var>old</var>=<var>new</var></code></dt>
  412. <dd><p>When assembling files in directory <samp><var>old</var></samp>, record debugging
  413. information describing them as in <samp><var>new</var></samp> instead.
  414. </p>
  415. </dd>
  416. <dt><code>--defsym <var>sym</var>=<var>value</var></code></dt>
  417. <dd><p>Define the symbol <var>sym</var> to be <var>value</var> before assembling the input file.
  418. <var>value</var> must be an integer constant. As in C, a leading &lsquo;<samp>0x</samp>&rsquo;
  419. indicates a hexadecimal value, and a leading &lsquo;<samp>0</samp>&rsquo; indicates an octal
  420. value. The value of the symbol can be overridden inside a source file via the
  421. use of a <code>.set</code> pseudo-op.
  422. </p>
  423. </dd>
  424. <dt><code>-f</code></dt>
  425. <dd><p>&ldquo;fast&rdquo;&mdash;skip whitespace and comment preprocessing (assume source is
  426. compiler output).
  427. </p>
  428. </dd>
  429. <dt><code>-g</code></dt>
  430. <dt><code>--gen-debug</code></dt>
  431. <dd><p>Generate debugging information for each assembler source line using whichever
  432. debug format is preferred by the target. This currently means either STABS,
  433. ECOFF or DWARF2.
  434. </p>
  435. </dd>
  436. <dt><code>--gstabs</code></dt>
  437. <dd><p>Generate stabs debugging information for each assembler line. This
  438. may help debugging assembler code, if the debugger can handle it.
  439. </p>
  440. </dd>
  441. <dt><code>--gstabs+</code></dt>
  442. <dd><p>Generate stabs debugging information for each assembler line, with GNU
  443. extensions that probably only gdb can handle, and that could make other
  444. debuggers crash or refuse to read your program. This
  445. may help debugging assembler code. Currently the only GNU extension is
  446. the location of the current working directory at assembling time.
  447. </p>
  448. </dd>
  449. <dt><code>--gdwarf-2</code></dt>
  450. <dd><p>Generate DWARF2 debugging information for each assembler line. This
  451. may help debugging assembler code, if the debugger can handle it. Note&mdash;this
  452. option is only supported by some targets, not all of them.
  453. </p>
  454. </dd>
  455. <dt><code>--gdwarf-sections</code></dt>
  456. <dd><p>Instead of creating a .debug_line section, create a series of
  457. .debug_line.<var>foo</var> sections where <var>foo</var> is the name of the
  458. corresponding code section. For example a code section called <var>.text.func</var>
  459. will have its dwarf line number information placed into a section called
  460. <var>.debug_line.text.func</var>. If the code section is just called <var>.text</var>
  461. then debug line section will still be called just <var>.debug_line</var> without any
  462. suffix.
  463. </p>
  464. </dd>
  465. <dt><code>--size-check=error</code></dt>
  466. <dt><code>--size-check=warning</code></dt>
  467. <dd><p>Issue an error or warning for invalid ELF .size directive.
  468. </p>
  469. </dd>
  470. <dt><code>--elf-stt-common=no</code></dt>
  471. <dt><code>--elf-stt-common=yes</code></dt>
  472. <dd><p>These options control whether the ELF assembler should generate common
  473. symbols with the <code>STT_COMMON</code> type. The default can be controlled
  474. by a configure option <samp>--enable-elf-stt-common</samp>.
  475. </p>
  476. </dd>
  477. <dt><code>--help</code></dt>
  478. <dd><p>Print a summary of the command line options and exit.
  479. </p>
  480. </dd>
  481. <dt><code>--target-help</code></dt>
  482. <dd><p>Print a summary of all target specific options and exit.
  483. </p>
  484. </dd>
  485. <dt><code>-I <var>dir</var></code></dt>
  486. <dd><p>Add directory <var>dir</var> to the search list for <code>.include</code> directives.
  487. </p>
  488. </dd>
  489. <dt><code>-J</code></dt>
  490. <dd><p>Don&rsquo;t warn about signed overflow.
  491. </p>
  492. </dd>
  493. <dt><code>-K</code></dt>
  494. <dd><p>Issue warnings when difference tables altered for long displacements.
  495. </p>
  496. </dd>
  497. <dt><code>-L</code></dt>
  498. <dt><code>--keep-locals</code></dt>
  499. <dd><p>Keep (in the symbol table) local symbols. These symbols start with
  500. system-specific local label prefixes, typically &lsquo;<samp>.L</samp>&rsquo; for ELF systems
  501. or &lsquo;<samp>L</samp>&rsquo; for traditional a.out systems.
  502. See <a href="Symbol-Names.html#Symbol-Names">Symbol Names</a>.
  503. </p>
  504. </dd>
  505. <dt><code>--listing-lhs-width=<var>number</var></code></dt>
  506. <dd><p>Set the maximum width, in words, of the output data column for an assembler
  507. listing to <var>number</var>.
  508. </p>
  509. </dd>
  510. <dt><code>--listing-lhs-width2=<var>number</var></code></dt>
  511. <dd><p>Set the maximum width, in words, of the output data column for continuation
  512. lines in an assembler listing to <var>number</var>.
  513. </p>
  514. </dd>
  515. <dt><code>--listing-rhs-width=<var>number</var></code></dt>
  516. <dd><p>Set the maximum width of an input source line, as displayed in a listing, to
  517. <var>number</var> bytes.
  518. </p>
  519. </dd>
  520. <dt><code>--listing-cont-lines=<var>number</var></code></dt>
  521. <dd><p>Set the maximum number of lines printed in a listing for a single line of input
  522. to <var>number</var> + 1.
  523. </p>
  524. </dd>
  525. <dt><code>--no-pad-sections</code></dt>
  526. <dd><p>Stop the assembler for padding the ends of output sections to the alignment
  527. of that section. The default is to pad the sections, but this can waste space
  528. which might be needed on targets which have tight memory constraints.
  529. </p>
  530. </dd>
  531. <dt><code>-o <var>objfile</var></code></dt>
  532. <dd><p>Name the object-file output from <code>as</code> <var>objfile</var>.
  533. </p>
  534. </dd>
  535. <dt><code>-R</code></dt>
  536. <dd><p>Fold the data section into the text section.
  537. </p>
  538. </dd>
  539. <dt><code>--hash-size=<var>number</var></code></dt>
  540. <dd><p>Set the default size of GAS&rsquo;s hash tables to a prime number close to
  541. <var>number</var>. Increasing this value can reduce the length of time it takes the
  542. assembler to perform its tasks, at the expense of increasing the assembler&rsquo;s
  543. memory requirements. Similarly reducing this value can reduce the memory
  544. requirements at the expense of speed.
  545. </p>
  546. </dd>
  547. <dt><code>--reduce-memory-overheads</code></dt>
  548. <dd><p>This option reduces GAS&rsquo;s memory requirements, at the expense of making the
  549. assembly processes slower. Currently this switch is a synonym for
  550. &lsquo;<samp>--hash-size=4051</samp>&rsquo;, but in the future it may have other effects as well.
  551. </p>
  552. </dd>
  553. <dt><code>--sectname-subst</code></dt>
  554. <dd><p>Honor substitution sequences in section names.
  555. See <a href="Section.html#Section-Name-Substitutions"><code>.section <var>name</var></code></a>.
  556. </p>
  557. </dd>
  558. <dt><code>--statistics</code></dt>
  559. <dd><p>Print the maximum space (in bytes) and total time (in seconds) used by
  560. assembly.
  561. </p>
  562. </dd>
  563. <dt><code>--strip-local-absolute</code></dt>
  564. <dd><p>Remove local absolute symbols from the outgoing symbol table.
  565. </p>
  566. </dd>
  567. <dt><code>-v</code></dt>
  568. <dt><code>-version</code></dt>
  569. <dd><p>Print the <code>as</code> version.
  570. </p>
  571. </dd>
  572. <dt><code>--version</code></dt>
  573. <dd><p>Print the <code>as</code> version and exit.
  574. </p>
  575. </dd>
  576. <dt><code>-W</code></dt>
  577. <dt><code>--no-warn</code></dt>
  578. <dd><p>Suppress warning messages.
  579. </p>
  580. </dd>
  581. <dt><code>--fatal-warnings</code></dt>
  582. <dd><p>Treat warnings as errors.
  583. </p>
  584. </dd>
  585. <dt><code>--warn</code></dt>
  586. <dd><p>Don&rsquo;t suppress warning messages or treat them as errors.
  587. </p>
  588. </dd>
  589. <dt><code>-w</code></dt>
  590. <dd><p>Ignored.
  591. </p>
  592. </dd>
  593. <dt><code>-x</code></dt>
  594. <dd><p>Ignored.
  595. </p>
  596. </dd>
  597. <dt><code>-Z</code></dt>
  598. <dd><p>Generate an object file even after errors.
  599. </p>
  600. </dd>
  601. <dt><code>-- | <var>files</var> &hellip;</code></dt>
  602. <dd><p>Standard input, or source files to assemble.
  603. </p>
  604. </dd>
  605. </dl>
  606. <p>See <a href="AArch64-Options.html#AArch64-Options">AArch64 Options</a>, for the options available when as is configured
  607. for the 64-bit mode of the ARM Architecture (AArch64).
  608. </p>
  609. <p>See <a href="Alpha-Options.html#Alpha-Options">Alpha Options</a>, for the options available when as is configured
  610. for an Alpha processor.
  611. </p>
  612. <p>The following options are available when as is configured for an ARC
  613. processor.
  614. </p>
  615. <dl compact="compact">
  616. <dt><code>-mcpu=<var>cpu</var></code></dt>
  617. <dd><p>This option selects the core processor variant.
  618. </p></dd>
  619. <dt><code>-EB | -EL</code></dt>
  620. <dd><p>Select either big-endian (-EB) or little-endian (-EL) output.
  621. </p></dd>
  622. <dt><code>-mcode-density</code></dt>
  623. <dd><p>Enable Code Density extenssion instructions.
  624. </p></dd>
  625. </dl>
  626. <p>The following options are available when as is configured for the ARM
  627. processor family.
  628. </p>
  629. <dl compact="compact">
  630. <dt><code>-mcpu=<var>processor</var>[+<var>extension</var>&hellip;]</code></dt>
  631. <dd><p>Specify which ARM processor variant is the target.
  632. </p></dd>
  633. <dt><code>-march=<var>architecture</var>[+<var>extension</var>&hellip;]</code></dt>
  634. <dd><p>Specify which ARM architecture variant is used by the target.
  635. </p></dd>
  636. <dt><code>-mfpu=<var>floating-point-format</var></code></dt>
  637. <dd><p>Select which Floating Point architecture is the target.
  638. </p></dd>
  639. <dt><code>-mfloat-abi=<var>abi</var></code></dt>
  640. <dd><p>Select which floating point ABI is in use.
  641. </p></dd>
  642. <dt><code>-mthumb</code></dt>
  643. <dd><p>Enable Thumb only instruction decoding.
  644. </p></dd>
  645. <dt><code>-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant</code></dt>
  646. <dd><p>Select which procedure calling convention is in use.
  647. </p></dd>
  648. <dt><code>-EB | -EL</code></dt>
  649. <dd><p>Select either big-endian (-EB) or little-endian (-EL) output.
  650. </p></dd>
  651. <dt><code>-mthumb-interwork</code></dt>
  652. <dd><p>Specify that the code has been generated with interworking between Thumb and
  653. ARM code in mind.
  654. </p></dd>
  655. <dt><code>-mccs</code></dt>
  656. <dd><p>Turns on CodeComposer Studio assembly syntax compatibility mode.
  657. </p></dd>
  658. <dt><code>-k</code></dt>
  659. <dd><p>Specify that PIC code has been generated.
  660. </p></dd>
  661. </dl>
  662. <p>See <a href="Blackfin-Options.html#Blackfin-Options">Blackfin Options</a>, for the options available when as is
  663. configured for the Blackfin processor family.
  664. </p>
  665. <p>See the info pages for documentation of the CRIS-specific options.
  666. </p>
  667. <p>The following options are available when as is configured for
  668. a D10V processor.
  669. </p><dl compact="compact">
  670. <dd><a name="index-D10V-optimization"></a>
  671. <a name="index-optimization_002c-D10V"></a>
  672. </dd>
  673. <dt><code>-O</code></dt>
  674. <dd><p>Optimize output by parallelizing instructions.
  675. </p></dd>
  676. </dl>
  677. <p>The following options are available when as is configured for a D30V
  678. processor.
  679. </p><dl compact="compact">
  680. <dd><a name="index-D30V-optimization"></a>
  681. <a name="index-optimization_002c-D30V"></a>
  682. </dd>
  683. <dt><code>-O</code></dt>
  684. <dd><p>Optimize output by parallelizing instructions.
  685. </p>
  686. <a name="index-D30V-nops"></a>
  687. </dd>
  688. <dt><code>-n</code></dt>
  689. <dd><p>Warn when nops are generated.
  690. </p>
  691. <a name="index-D30V-nops-after-32_002dbit-multiply"></a>
  692. </dd>
  693. <dt><code>-N</code></dt>
  694. <dd><p>Warn when a nop after a 32-bit multiply instruction is generated.
  695. </p></dd>
  696. </dl>
  697. <p>The following options are available when as is configured for the
  698. Adapteva EPIPHANY series.
  699. </p>
  700. <p>See <a href="Epiphany-Options.html#Epiphany-Options">Epiphany Options</a>, for the options available when as is
  701. configured for an Epiphany processor.
  702. </p>
  703. <p>See <a href="i386_002dOptions.html#i386_002dOptions">i386-Options</a>, for the options available when as is
  704. configured for an i386 processor.
  705. </p>
  706. <p>The following options are available when as is configured for the
  707. Intel 80960 processor.
  708. </p>
  709. <dl compact="compact">
  710. <dt><code>-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC</code></dt>
  711. <dd><p>Specify which variant of the 960 architecture is the target.
  712. </p>
  713. </dd>
  714. <dt><code>-b</code></dt>
  715. <dd><p>Add code to collect statistics about branches taken.
  716. </p>
  717. </dd>
  718. <dt><code>-no-relax</code></dt>
  719. <dd><p>Do not alter compare-and-branch instructions for long displacements;
  720. error if necessary.
  721. </p>
  722. </dd>
  723. </dl>
  724. <p>The following options are available when as is configured for the
  725. Ubicom IP2K series.
  726. </p>
  727. <dl compact="compact">
  728. <dt><code>-mip2022ext</code></dt>
  729. <dd><p>Specifies that the extended IP2022 instructions are allowed.
  730. </p>
  731. </dd>
  732. <dt><code>-mip2022</code></dt>
  733. <dd><p>Restores the default behaviour, which restricts the permitted instructions to
  734. just the basic IP2022 ones.
  735. </p>
  736. </dd>
  737. </dl>
  738. <p>The following options are available when as is configured for the
  739. Renesas M32C and M16C processors.
  740. </p>
  741. <dl compact="compact">
  742. <dt><code>-m32c</code></dt>
  743. <dd><p>Assemble M32C instructions.
  744. </p>
  745. </dd>
  746. <dt><code>-m16c</code></dt>
  747. <dd><p>Assemble M16C instructions (the default).
  748. </p>
  749. </dd>
  750. <dt><code>-relax</code></dt>
  751. <dd><p>Enable support for link-time relaxations.
  752. </p>
  753. </dd>
  754. <dt><code>-h-tick-hex</code></dt>
  755. <dd><p>Support H&rsquo;00 style hex constants in addition to 0x00 style.
  756. </p>
  757. </dd>
  758. </dl>
  759. <p>The following options are available when as is configured for the
  760. Renesas M32R (formerly Mitsubishi M32R) series.
  761. </p>
  762. <dl compact="compact">
  763. <dt><code>--m32rx</code></dt>
  764. <dd><p>Specify which processor in the M32R family is the target. The default
  765. is normally the M32R, but this option changes it to the M32RX.
  766. </p>
  767. </dd>
  768. <dt><code>--warn-explicit-parallel-conflicts or --Wp</code></dt>
  769. <dd><p>Produce warning messages when questionable parallel constructs are
  770. encountered.
  771. </p>
  772. </dd>
  773. <dt><code>--no-warn-explicit-parallel-conflicts or --Wnp</code></dt>
  774. <dd><p>Do not produce warning messages when questionable parallel constructs are
  775. encountered.
  776. </p>
  777. </dd>
  778. </dl>
  779. <p>The following options are available when as is configured for the
  780. Motorola 68000 series.
  781. </p>
  782. <dl compact="compact">
  783. <dt><code>-l</code></dt>
  784. <dd><p>Shorten references to undefined symbols, to one word instead of two.
  785. </p>
  786. </dd>
  787. <dt><code>-m68000 | -m68008 | -m68010 | -m68020 | -m68030</code></dt>
  788. <dt><code>| -m68040 | -m68060 | -m68302 | -m68331 | -m68332</code></dt>
  789. <dt><code>| -m68333 | -m68340 | -mcpu32 | -m5200</code></dt>
  790. <dd><p>Specify what processor in the 68000 family is the target. The default
  791. is normally the 68020, but this can be changed at configuration time.
  792. </p>
  793. </dd>
  794. <dt><code>-m68881 | -m68882 | -mno-68881 | -mno-68882</code></dt>
  795. <dd><p>The target machine does (or does not) have a floating-point coprocessor.
  796. The default is to assume a coprocessor for 68020, 68030, and cpu32. Although
  797. the basic 68000 is not compatible with the 68881, a combination of the
  798. two can be specified, since it&rsquo;s possible to do emulation of the
  799. coprocessor instructions with the main processor.
  800. </p>
  801. </dd>
  802. <dt><code>-m68851 | -mno-68851</code></dt>
  803. <dd><p>The target machine does (or does not) have a memory-management
  804. unit coprocessor. The default is to assume an MMU for 68020 and up.
  805. </p>
  806. </dd>
  807. </dl>
  808. <p>See <a href="Nios-II-Options.html#Nios-II-Options">Nios II Options</a>, for the options available when as is configured
  809. for an Altera Nios II processor.
  810. </p>
  811. <p>For details about the PDP-11 machine dependent features options,
  812. see <a href="PDP_002d11_002dOptions.html#PDP_002d11_002dOptions">PDP-11-Options</a>.
  813. </p>
  814. <dl compact="compact">
  815. <dt><code>-mpic | -mno-pic</code></dt>
  816. <dd><p>Generate position-independent (or position-dependent) code. The
  817. default is <samp>-mpic</samp>.
  818. </p>
  819. </dd>
  820. <dt><code>-mall</code></dt>
  821. <dt><code>-mall-extensions</code></dt>
  822. <dd><p>Enable all instruction set extensions. This is the default.
  823. </p>
  824. </dd>
  825. <dt><code>-mno-extensions</code></dt>
  826. <dd><p>Disable all instruction set extensions.
  827. </p>
  828. </dd>
  829. <dt><code>-m<var>extension</var> | -mno-<var>extension</var></code></dt>
  830. <dd><p>Enable (or disable) a particular instruction set extension.
  831. </p>
  832. </dd>
  833. <dt><code>-m<var>cpu</var></code></dt>
  834. <dd><p>Enable the instruction set extensions supported by a particular CPU, and
  835. disable all other extensions.
  836. </p>
  837. </dd>
  838. <dt><code>-m<var>machine</var></code></dt>
  839. <dd><p>Enable the instruction set extensions supported by a particular machine
  840. model, and disable all other extensions.
  841. </p></dd>
  842. </dl>
  843. <p>The following options are available when as is configured for
  844. a picoJava processor.
  845. </p>
  846. <dl compact="compact">
  847. <dd>
  848. <a name="index-PJ-endianness"></a>
  849. <a name="index-endianness_002c-PJ"></a>
  850. <a name="index-big-endian-output_002c-PJ"></a>
  851. </dd>
  852. <dt><code>-mb</code></dt>
  853. <dd><p>Generate &ldquo;big endian&rdquo; format output.
  854. </p>
  855. <a name="index-little-endian-output_002c-PJ"></a>
  856. </dd>
  857. <dt><code>-ml</code></dt>
  858. <dd><p>Generate &ldquo;little endian&rdquo; format output.
  859. </p>
  860. </dd>
  861. </dl>
  862. <p>The following options are available when as is configured for the
  863. Motorola 68HC11 or 68HC12 series.
  864. </p>
  865. <dl compact="compact">
  866. <dt><code>-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg</code></dt>
  867. <dd><p>Specify what processor is the target. The default is
  868. defined by the configuration option when building the assembler.
  869. </p>
  870. </dd>
  871. <dt><code>--xgate-ramoffset</code></dt>
  872. <dd><p>Instruct the linker to offset RAM addresses from S12X address space into
  873. XGATE address space.
  874. </p>
  875. </dd>
  876. <dt><code>-mshort</code></dt>
  877. <dd><p>Specify to use the 16-bit integer ABI.
  878. </p>
  879. </dd>
  880. <dt><code>-mlong</code></dt>
  881. <dd><p>Specify to use the 32-bit integer ABI.
  882. </p>
  883. </dd>
  884. <dt><code>-mshort-double</code></dt>
  885. <dd><p>Specify to use the 32-bit double ABI.
  886. </p>
  887. </dd>
  888. <dt><code>-mlong-double</code></dt>
  889. <dd><p>Specify to use the 64-bit double ABI.
  890. </p>
  891. </dd>
  892. <dt><code>--force-long-branches</code></dt>
  893. <dd><p>Relative branches are turned into absolute ones. This concerns
  894. conditional branches, unconditional branches and branches to a
  895. sub routine.
  896. </p>
  897. </dd>
  898. <dt><code>-S | --short-branches</code></dt>
  899. <dd><p>Do not turn relative branches into absolute ones
  900. when the offset is out of range.
  901. </p>
  902. </dd>
  903. <dt><code>--strict-direct-mode</code></dt>
  904. <dd><p>Do not turn the direct addressing mode into extended addressing mode
  905. when the instruction does not support direct addressing mode.
  906. </p>
  907. </dd>
  908. <dt><code>--print-insn-syntax</code></dt>
  909. <dd><p>Print the syntax of instruction in case of error.
  910. </p>
  911. </dd>
  912. <dt><code>--print-opcodes</code></dt>
  913. <dd><p>Print the list of instructions with syntax and then exit.
  914. </p>
  915. </dd>
  916. <dt><code>--generate-example</code></dt>
  917. <dd><p>Print an example of instruction for each possible instruction and then exit.
  918. This option is only useful for testing <code>as</code>.
  919. </p>
  920. </dd>
  921. </dl>
  922. <p>The following options are available when <code>as</code> is configured
  923. for the SPARC architecture:
  924. </p>
  925. <dl compact="compact">
  926. <dt><code>-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite</code></dt>
  927. <dt><code>-Av8plus | -Av8plusa | -Av9 | -Av9a</code></dt>
  928. <dd><p>Explicitly select a variant of the SPARC architecture.
  929. </p>
  930. <p>&lsquo;<samp>-Av8plus</samp>&rsquo; and &lsquo;<samp>-Av8plusa</samp>&rsquo; select a 32 bit environment.
  931. &lsquo;<samp>-Av9</samp>&rsquo; and &lsquo;<samp>-Av9a</samp>&rsquo; select a 64 bit environment.
  932. </p>
  933. <p>&lsquo;<samp>-Av8plusa</samp>&rsquo; and &lsquo;<samp>-Av9a</samp>&rsquo; enable the SPARC V9 instruction set with
  934. UltraSPARC extensions.
  935. </p>
  936. </dd>
  937. <dt><code>-xarch=v8plus | -xarch=v8plusa</code></dt>
  938. <dd><p>For compatibility with the Solaris v9 assembler. These options are
  939. equivalent to -Av8plus and -Av8plusa, respectively.
  940. </p>
  941. </dd>
  942. <dt><code>-bump</code></dt>
  943. <dd><p>Warn when the assembler switches to another architecture.
  944. </p></dd>
  945. </dl>
  946. <p>The following options are available when as is configured for the &rsquo;c54x
  947. architecture.
  948. </p>
  949. <dl compact="compact">
  950. <dt><code>-mfar-mode</code></dt>
  951. <dd><p>Enable extended addressing mode. All addresses and relocations will assume
  952. extended addressing (usually 23 bits).
  953. </p></dd>
  954. <dt><code>-mcpu=<var>CPU_VERSION</var></code></dt>
  955. <dd><p>Sets the CPU version being compiled for.
  956. </p></dd>
  957. <dt><code>-merrors-to-file <var>FILENAME</var></code></dt>
  958. <dd><p>Redirect error output to a file, for broken systems which don&rsquo;t support such
  959. behaviour in the shell.
  960. </p></dd>
  961. </dl>
  962. <p>The following options are available when as is configured for
  963. a MIPS processor.
  964. </p>
  965. <dl compact="compact">
  966. <dt><code>-G <var>num</var></code></dt>
  967. <dd><p>This option sets the largest size of an object that can be referenced
  968. implicitly with the <code>gp</code> register. It is only accepted for targets that
  969. use ECOFF format, such as a DECstation running Ultrix. The default value is 8.
  970. </p>
  971. <a name="index-MIPS-endianness"></a>
  972. <a name="index-endianness_002c-MIPS"></a>
  973. <a name="index-big-endian-output_002c-MIPS"></a>
  974. </dd>
  975. <dt><code>-EB</code></dt>
  976. <dd><p>Generate &ldquo;big endian&rdquo; format output.
  977. </p>
  978. <a name="index-little-endian-output_002c-MIPS"></a>
  979. </dd>
  980. <dt><code>-EL</code></dt>
  981. <dd><p>Generate &ldquo;little endian&rdquo; format output.
  982. </p>
  983. <a name="index-MIPS-ISA"></a>
  984. </dd>
  985. <dt><code>-mips1</code></dt>
  986. <dt><code>-mips2</code></dt>
  987. <dt><code>-mips3</code></dt>
  988. <dt><code>-mips4</code></dt>
  989. <dt><code>-mips5</code></dt>
  990. <dt><code>-mips32</code></dt>
  991. <dt><code>-mips32r2</code></dt>
  992. <dt><code>-mips32r3</code></dt>
  993. <dt><code>-mips32r5</code></dt>
  994. <dt><code>-mips32r6</code></dt>
  995. <dt><code>-mips64</code></dt>
  996. <dt><code>-mips64r2</code></dt>
  997. <dt><code>-mips64r3</code></dt>
  998. <dt><code>-mips64r5</code></dt>
  999. <dt><code>-mips64r6</code></dt>
  1000. <dd><p>Generate code for a particular MIPS Instruction Set Architecture level.
  1001. &lsquo;<samp>-mips1</samp>&rsquo; is an alias for &lsquo;<samp>-march=r3000</samp>&rsquo;, &lsquo;<samp>-mips2</samp>&rsquo; is an
  1002. alias for &lsquo;<samp>-march=r6000</samp>&rsquo;, &lsquo;<samp>-mips3</samp>&rsquo; is an alias for
  1003. &lsquo;<samp>-march=r4000</samp>&rsquo; and &lsquo;<samp>-mips4</samp>&rsquo; is an alias for &lsquo;<samp>-march=r8000</samp>&rsquo;.
  1004. &lsquo;<samp>-mips5</samp>&rsquo;, &lsquo;<samp>-mips32</samp>&rsquo;, &lsquo;<samp>-mips32r2</samp>&rsquo;, &lsquo;<samp>-mips32r3</samp>&rsquo;,
  1005. &lsquo;<samp>-mips32r5</samp>&rsquo;, &lsquo;<samp>-mips32r6</samp>&rsquo;, &lsquo;<samp>-mips64</samp>&rsquo;, &lsquo;<samp>-mips64r2</samp>&rsquo;,
  1006. &lsquo;<samp>-mips64r3</samp>&rsquo;, &lsquo;<samp>-mips64r5</samp>&rsquo;, and &lsquo;<samp>-mips64r6</samp>&rsquo; correspond to generic
  1007. MIPS V, MIPS32, MIPS32 Release 2, MIPS32 Release 3, MIPS32 Release 5, MIPS32
  1008. Release 6, MIPS64, MIPS64 Release 2, MIPS64 Release 3, MIPS64 Release 5, and
  1009. MIPS64 Release 6 ISA processors, respectively.
  1010. </p>
  1011. </dd>
  1012. <dt><code>-march=<var>cpu</var></code></dt>
  1013. <dd><p>Generate code for a particular MIPS CPU.
  1014. </p>
  1015. </dd>
  1016. <dt><code>-mtune=<var>cpu</var></code></dt>
  1017. <dd><p>Schedule and tune for a particular MIPS CPU.
  1018. </p>
  1019. </dd>
  1020. <dt><code>-mfix7000</code></dt>
  1021. <dt><code>-mno-fix7000</code></dt>
  1022. <dd><p>Cause nops to be inserted if the read of the destination register
  1023. of an mfhi or mflo instruction occurs in the following two instructions.
  1024. </p>
  1025. </dd>
  1026. <dt><code>-mfix-rm7000</code></dt>
  1027. <dt><code>-mno-fix-rm7000</code></dt>
  1028. <dd><p>Cause nops to be inserted if a dmult or dmultu instruction is
  1029. followed by a load instruction.
  1030. </p>
  1031. </dd>
  1032. <dt><code>-mdebug</code></dt>
  1033. <dt><code>-no-mdebug</code></dt>
  1034. <dd><p>Cause stabs-style debugging output to go into an ECOFF-style .mdebug
  1035. section instead of the standard ELF .stabs sections.
  1036. </p>
  1037. </dd>
  1038. <dt><code>-mpdr</code></dt>
  1039. <dt><code>-mno-pdr</code></dt>
  1040. <dd><p>Control generation of <code>.pdr</code> sections.
  1041. </p>
  1042. </dd>
  1043. <dt><code>-mgp32</code></dt>
  1044. <dt><code>-mfp32</code></dt>
  1045. <dd><p>The register sizes are normally inferred from the ISA and ABI, but these
  1046. flags force a certain group of registers to be treated as 32 bits wide at
  1047. all times. &lsquo;<samp>-mgp32</samp>&rsquo; controls the size of general-purpose registers
  1048. and &lsquo;<samp>-mfp32</samp>&rsquo; controls the size of floating-point registers.
  1049. </p>
  1050. </dd>
  1051. <dt><code>-mgp64</code></dt>
  1052. <dt><code>-mfp64</code></dt>
  1053. <dd><p>The register sizes are normally inferred from the ISA and ABI, but these
  1054. flags force a certain group of registers to be treated as 64 bits wide at
  1055. all times. &lsquo;<samp>-mgp64</samp>&rsquo; controls the size of general-purpose registers
  1056. and &lsquo;<samp>-mfp64</samp>&rsquo; controls the size of floating-point registers.
  1057. </p>
  1058. </dd>
  1059. <dt><code>-mfpxx</code></dt>
  1060. <dd><p>The register sizes are normally inferred from the ISA and ABI, but using
  1061. this flag in combination with &lsquo;<samp>-mabi=32</samp>&rsquo; enables an ABI variant
  1062. which will operate correctly with floating-point registers which are
  1063. 32 or 64 bits wide.
  1064. </p>
  1065. </dd>
  1066. <dt><code>-modd-spreg</code></dt>
  1067. <dt><code>-mno-odd-spreg</code></dt>
  1068. <dd><p>Enable use of floating-point operations on odd-numbered single-precision
  1069. registers when supported by the ISA. &lsquo;<samp>-mfpxx</samp>&rsquo; implies
  1070. &lsquo;<samp>-mno-odd-spreg</samp>&rsquo;, otherwise the default is &lsquo;<samp>-modd-spreg</samp>&rsquo;.
  1071. </p>
  1072. </dd>
  1073. <dt><code>-mips16</code></dt>
  1074. <dt><code>-no-mips16</code></dt>
  1075. <dd><p>Generate code for the MIPS 16 processor. This is equivalent to putting
  1076. <code>.set mips16</code> at the start of the assembly file. &lsquo;<samp>-no-mips16</samp>&rsquo;
  1077. turns off this option.
  1078. </p>
  1079. </dd>
  1080. <dt><code>-mmicromips</code></dt>
  1081. <dt><code>-mno-micromips</code></dt>
  1082. <dd><p>Generate code for the microMIPS processor. This is equivalent to putting
  1083. <code>.set micromips</code> at the start of the assembly file. &lsquo;<samp>-mno-micromips</samp>&rsquo;
  1084. turns off this option. This is equivalent to putting <code>.set nomicromips</code>
  1085. at the start of the assembly file.
  1086. </p>
  1087. </dd>
  1088. <dt><code>-msmartmips</code></dt>
  1089. <dt><code>-mno-smartmips</code></dt>
  1090. <dd><p>Enables the SmartMIPS extension to the MIPS32 instruction set. This is
  1091. equivalent to putting <code>.set smartmips</code> at the start of the assembly file.
  1092. &lsquo;<samp>-mno-smartmips</samp>&rsquo; turns off this option.
  1093. </p>
  1094. </dd>
  1095. <dt><code>-mips3d</code></dt>
  1096. <dt><code>-no-mips3d</code></dt>
  1097. <dd><p>Generate code for the MIPS-3D Application Specific Extension.
  1098. This tells the assembler to accept MIPS-3D instructions.
  1099. &lsquo;<samp>-no-mips3d</samp>&rsquo; turns off this option.
  1100. </p>
  1101. </dd>
  1102. <dt><code>-mdmx</code></dt>
  1103. <dt><code>-no-mdmx</code></dt>
  1104. <dd><p>Generate code for the MDMX Application Specific Extension.
  1105. This tells the assembler to accept MDMX instructions.
  1106. &lsquo;<samp>-no-mdmx</samp>&rsquo; turns off this option.
  1107. </p>
  1108. </dd>
  1109. <dt><code>-mdsp</code></dt>
  1110. <dt><code>-mno-dsp</code></dt>
  1111. <dd><p>Generate code for the DSP Release 1 Application Specific Extension.
  1112. This tells the assembler to accept DSP Release 1 instructions.
  1113. &lsquo;<samp>-mno-dsp</samp>&rsquo; turns off this option.
  1114. </p>
  1115. </dd>
  1116. <dt><code>-mdspr2</code></dt>
  1117. <dt><code>-mno-dspr2</code></dt>
  1118. <dd><p>Generate code for the DSP Release 2 Application Specific Extension.
  1119. This option implies &lsquo;<samp>-mdsp</samp>&rsquo;.
  1120. This tells the assembler to accept DSP Release 2 instructions.
  1121. &lsquo;<samp>-mno-dspr2</samp>&rsquo; turns off this option.
  1122. </p>
  1123. </dd>
  1124. <dt><code>-mdspr3</code></dt>
  1125. <dt><code>-mno-dspr3</code></dt>
  1126. <dd><p>Generate code for the DSP Release 3 Application Specific Extension.
  1127. This option implies &lsquo;<samp>-mdsp</samp>&rsquo; and &lsquo;<samp>-mdspr2</samp>&rsquo;.
  1128. This tells the assembler to accept DSP Release 3 instructions.
  1129. &lsquo;<samp>-mno-dspr3</samp>&rsquo; turns off this option.
  1130. </p>
  1131. </dd>
  1132. <dt><code>-mmsa</code></dt>
  1133. <dt><code>-mno-msa</code></dt>
  1134. <dd><p>Generate code for the MIPS SIMD Architecture Extension.
  1135. This tells the assembler to accept MSA instructions.
  1136. &lsquo;<samp>-mno-msa</samp>&rsquo; turns off this option.
  1137. </p>
  1138. </dd>
  1139. <dt><code>-mxpa</code></dt>
  1140. <dt><code>-mno-xpa</code></dt>
  1141. <dd><p>Generate code for the MIPS eXtended Physical Address (XPA) Extension.
  1142. This tells the assembler to accept XPA instructions.
  1143. &lsquo;<samp>-mno-xpa</samp>&rsquo; turns off this option.
  1144. </p>
  1145. </dd>
  1146. <dt><code>-mmt</code></dt>
  1147. <dt><code>-mno-mt</code></dt>
  1148. <dd><p>Generate code for the MT Application Specific Extension.
  1149. This tells the assembler to accept MT instructions.
  1150. &lsquo;<samp>-mno-mt</samp>&rsquo; turns off this option.
  1151. </p>
  1152. </dd>
  1153. <dt><code>-mmcu</code></dt>
  1154. <dt><code>-mno-mcu</code></dt>
  1155. <dd><p>Generate code for the MCU Application Specific Extension.
  1156. This tells the assembler to accept MCU instructions.
  1157. &lsquo;<samp>-mno-mcu</samp>&rsquo; turns off this option.
  1158. </p>
  1159. </dd>
  1160. <dt><code>-minsn32</code></dt>
  1161. <dt><code>-mno-insn32</code></dt>
  1162. <dd><p>Only use 32-bit instruction encodings when generating code for the
  1163. microMIPS processor. This option inhibits the use of any 16-bit
  1164. instructions. This is equivalent to putting <code>.set insn32</code> at
  1165. the start of the assembly file. &lsquo;<samp>-mno-insn32</samp>&rsquo; turns off this
  1166. option. This is equivalent to putting <code>.set noinsn32</code> at the
  1167. start of the assembly file. By default &lsquo;<samp>-mno-insn32</samp>&rsquo; is
  1168. selected, allowing all instructions to be used.
  1169. </p>
  1170. </dd>
  1171. <dt><code>--construct-floats</code></dt>
  1172. <dt><code>--no-construct-floats</code></dt>
  1173. <dd><p>The &lsquo;<samp>--no-construct-floats</samp>&rsquo; option disables the construction of
  1174. double width floating point constants by loading the two halves of the
  1175. value into the two single width floating point registers that make up
  1176. the double width register. By default &lsquo;<samp>--construct-floats</samp>&rsquo; is
  1177. selected, allowing construction of these floating point constants.
  1178. </p>
  1179. </dd>
  1180. <dt><code>--relax-branch</code></dt>
  1181. <dt><code>--no-relax-branch</code></dt>
  1182. <dd><p>The &lsquo;<samp>--relax-branch</samp>&rsquo; option enables the relaxation of out-of-range
  1183. branches. By default &lsquo;<samp>--no-relax-branch</samp>&rsquo; is selected, causing any
  1184. out-of-range branches to produce an error.
  1185. </p>
  1186. </dd>
  1187. <dt><code>-mignore-branch-isa</code></dt>
  1188. <dt><code>-mno-ignore-branch-isa</code></dt>
  1189. <dd><p>Ignore branch checks for invalid transitions between ISA modes. The
  1190. semantics of branches does not provide for an ISA mode switch, so in
  1191. most cases the ISA mode a branch has been encoded for has to be the
  1192. same as the ISA mode of the branch&rsquo;s target label. Therefore GAS has
  1193. checks implemented that verify in branch assembly that the two ISA
  1194. modes match. &lsquo;<samp>-mignore-branch-isa</samp>&rsquo; disables these checks. By
  1195. default &lsquo;<samp>-mno-ignore-branch-isa</samp>&rsquo; is selected, causing any invalid
  1196. branch requiring a transition between ISA modes to produce an error.
  1197. </p>
  1198. </dd>
  1199. <dt><code>-mnan=<var>encoding</var></code></dt>
  1200. <dd><p>Select between the IEEE 754-2008 (<samp>-mnan=2008</samp>) or the legacy
  1201. (<samp>-mnan=legacy</samp>) NaN encoding format. The latter is the default.
  1202. </p>
  1203. <a name="index-emulation"></a>
  1204. </dd>
  1205. <dt><code>--emulation=<var>name</var></code></dt>
  1206. <dd><p>This option was formerly used to switch between ELF and ECOFF output
  1207. on targets like IRIX 5 that supported both. MIPS ECOFF support was
  1208. removed in GAS 2.24, so the option now serves little purpose.
  1209. It is retained for backwards compatibility.
  1210. </p>
  1211. <p>The available configuration names are: &lsquo;<samp>mipself</samp>&rsquo;, &lsquo;<samp>mipslelf</samp>&rsquo; and
  1212. &lsquo;<samp>mipsbelf</samp>&rsquo;. Choosing &lsquo;<samp>mipself</samp>&rsquo; now has no effect, since the output
  1213. is always ELF. &lsquo;<samp>mipslelf</samp>&rsquo; and &lsquo;<samp>mipsbelf</samp>&rsquo; select little- and
  1214. big-endian output respectively, but &lsquo;<samp>-EL</samp>&rsquo; and &lsquo;<samp>-EB</samp>&rsquo; are now the
  1215. preferred options instead.
  1216. </p>
  1217. </dd>
  1218. <dt><code>-nocpp</code></dt>
  1219. <dd><p><code>as</code> ignores this option. It is accepted for compatibility with
  1220. the native tools.
  1221. </p>
  1222. </dd>
  1223. <dt><code>--trap</code></dt>
  1224. <dt><code>--no-trap</code></dt>
  1225. <dt><code>--break</code></dt>
  1226. <dt><code>--no-break</code></dt>
  1227. <dd><p>Control how to deal with multiplication overflow and division by zero.
  1228. &lsquo;<samp>--trap</samp>&rsquo; or &lsquo;<samp>--no-break</samp>&rsquo; (which are synonyms) take a trap exception
  1229. (and only work for Instruction Set Architecture level 2 and higher);
  1230. &lsquo;<samp>--break</samp>&rsquo; or &lsquo;<samp>--no-trap</samp>&rsquo; (also synonyms, and the default) take a
  1231. break exception.
  1232. </p>
  1233. </dd>
  1234. <dt><code>-n</code></dt>
  1235. <dd><p>When this option is used, <code>as</code> will issue a warning every
  1236. time it generates a nop instruction from a macro.
  1237. </p></dd>
  1238. </dl>
  1239. <p>The following options are available when as is configured for
  1240. an MCore processor.
  1241. </p>
  1242. <dl compact="compact">
  1243. <dt><code>-jsri2bsr</code></dt>
  1244. <dt><code>-nojsri2bsr</code></dt>
  1245. <dd><p>Enable or disable the JSRI to BSR transformation. By default this is enabled.
  1246. The command line option &lsquo;<samp>-nojsri2bsr</samp>&rsquo; can be used to disable it.
  1247. </p>
  1248. </dd>
  1249. <dt><code>-sifilter</code></dt>
  1250. <dt><code>-nosifilter</code></dt>
  1251. <dd><p>Enable or disable the silicon filter behaviour. By default this is disabled.
  1252. The default can be overridden by the &lsquo;<samp>-sifilter</samp>&rsquo; command line option.
  1253. </p>
  1254. </dd>
  1255. <dt><code>-relax</code></dt>
  1256. <dd><p>Alter jump instructions for long displacements.
  1257. </p>
  1258. </dd>
  1259. <dt><code>-mcpu=[210|340]</code></dt>
  1260. <dd><p>Select the cpu type on the target hardware. This controls which instructions
  1261. can be assembled.
  1262. </p>
  1263. </dd>
  1264. <dt><code>-EB</code></dt>
  1265. <dd><p>Assemble for a big endian target.
  1266. </p>
  1267. </dd>
  1268. <dt><code>-EL</code></dt>
  1269. <dd><p>Assemble for a little endian target.
  1270. </p>
  1271. </dd>
  1272. </dl>
  1273. <p>See <a href="Meta-Options.html#Meta-Options">Meta Options</a>, for the options available when as is configured
  1274. for a Meta processor.
  1275. </p>
  1276. <p>See the info pages for documentation of the MMIX-specific options.
  1277. </p>
  1278. <p>See <a href="NDS32-Options.html#NDS32-Options">NDS32 Options</a>, for the options available when as is configured
  1279. for a NDS32 processor.
  1280. </p>
  1281. <p>See <a href="PowerPC_002dOpts.html#PowerPC_002dOpts">PowerPC-Opts</a>, for the options available when as is configured
  1282. for a PowerPC processor.
  1283. </p>
  1284. <p>See <a href="RISC_002dV_002dOpts.html#RISC_002dV_002dOpts">RISC-V-Opts</a>, for the options available when as is configured
  1285. for a RISC-V processor.
  1286. </p>
  1287. <p>See the info pages for documentation of the RX-specific options.
  1288. </p>
  1289. <p>The following options are available when as is configured for the s390
  1290. processor family.
  1291. </p>
  1292. <dl compact="compact">
  1293. <dt><code>-m31</code></dt>
  1294. <dt><code>-m64</code></dt>
  1295. <dd><p>Select the word size, either 31/32 bits or 64 bits.
  1296. </p></dd>
  1297. <dt><code>-mesa</code></dt>
  1298. <dt><code>-mzarch</code></dt>
  1299. <dd><p>Select the architecture mode, either the Enterprise System
  1300. Architecture (esa) or the z/Architecture mode (zarch).
  1301. </p></dd>
  1302. <dt><code>-march=<var>processor</var></code></dt>
  1303. <dd><p>Specify which s390 processor variant is the target, &lsquo;<samp>g5</samp>&rsquo; (or
  1304. &lsquo;<samp>arch3</samp>&rsquo;), &lsquo;<samp>g6</samp>&rsquo;, &lsquo;<samp>z900</samp>&rsquo; (or &lsquo;<samp>arch5</samp>&rsquo;), &lsquo;<samp>z990</samp>&rsquo; (or
  1305. &lsquo;<samp>arch6</samp>&rsquo;), &lsquo;<samp>z9-109</samp>&rsquo;, &lsquo;<samp>z9-ec</samp>&rsquo; (or &lsquo;<samp>arch7</samp>&rsquo;), &lsquo;<samp>z10</samp>&rsquo; (or
  1306. &lsquo;<samp>arch8</samp>&rsquo;), &lsquo;<samp>z196</samp>&rsquo; (or &lsquo;<samp>arch9</samp>&rsquo;), &lsquo;<samp>zEC12</samp>&rsquo; (or &lsquo;<samp>arch10</samp>&rsquo;),
  1307. &lsquo;<samp>z13</samp>&rsquo; (or &lsquo;<samp>arch11</samp>&rsquo;), or &lsquo;<samp>z14</samp>&rsquo; (or &lsquo;<samp>arch12</samp>&rsquo;).
  1308. </p></dd>
  1309. <dt><code>-mregnames</code></dt>
  1310. <dt><code>-mno-regnames</code></dt>
  1311. <dd><p>Allow or disallow symbolic names for registers.
  1312. </p></dd>
  1313. <dt><code>-mwarn-areg-zero</code></dt>
  1314. <dd><p>Warn whenever the operand for a base or index register has been specified
  1315. but evaluates to zero.
  1316. </p></dd>
  1317. </dl>
  1318. <p>See <a href="TIC6X-Options.html#TIC6X-Options">TIC6X Options</a>, for the options available when as is configured
  1319. for a TMS320C6000 processor.
  1320. </p>
  1321. <p>See <a href="TILE_002dGx-Options.html#TILE_002dGx-Options">TILE-Gx Options</a>, for the options available when as is configured
  1322. for a TILE-Gx processor.
  1323. </p>
  1324. <p>See <a href="Visium-Options.html#Visium-Options">Visium Options</a>, for the options available when as is configured
  1325. for a Visium processor.
  1326. </p>
  1327. <p>See <a href="Xtensa-Options.html#Xtensa-Options">Xtensa Options</a>, for the options available when as is configured
  1328. for an Xtensa processor.
  1329. </p>
  1330. <p>The following options are available when as is configured for
  1331. a Z80 family processor.
  1332. </p><dl compact="compact">
  1333. <dt><code>-z80</code></dt>
  1334. <dd><p>Assemble for Z80 processor.
  1335. </p></dd>
  1336. <dt><code>-r800</code></dt>
  1337. <dd><p>Assemble for R800 processor.
  1338. </p></dd>
  1339. <dt><code>-ignore-undocumented-instructions</code></dt>
  1340. <dt><code>-Wnud</code></dt>
  1341. <dd><p>Assemble undocumented Z80 instructions that also work on R800 without warning.
  1342. </p></dd>
  1343. <dt><code>-ignore-unportable-instructions</code></dt>
  1344. <dt><code>-Wnup</code></dt>
  1345. <dd><p>Assemble all undocumented Z80 instructions without warning.
  1346. </p></dd>
  1347. <dt><code>-warn-undocumented-instructions</code></dt>
  1348. <dt><code>-Wud</code></dt>
  1349. <dd><p>Issue a warning for undocumented Z80 instructions that also work on R800.
  1350. </p></dd>
  1351. <dt><code>-warn-unportable-instructions</code></dt>
  1352. <dt><code>-Wup</code></dt>
  1353. <dd><p>Issue a warning for undocumented Z80 instructions that do not work on R800.
  1354. </p></dd>
  1355. <dt><code>-forbid-undocumented-instructions</code></dt>
  1356. <dt><code>-Fud</code></dt>
  1357. <dd><p>Treat all undocumented instructions as errors.
  1358. </p></dd>
  1359. <dt><code>-forbid-unportable-instructions</code></dt>
  1360. <dt><code>-Fup</code></dt>
  1361. <dd><p>Treat undocumented Z80 instructions that do not work on R800 as errors.
  1362. </p></dd>
  1363. </dl>
  1364. <table class="menu" border="0" cellspacing="0">
  1365. <tr><td align="left" valign="top">&bull; <a href="Manual.html#Manual" accesskey="1">Manual</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Structure of this Manual
  1366. </td></tr>
  1367. <tr><td align="left" valign="top">&bull; <a href="GNU-Assembler.html#GNU-Assembler" accesskey="2">GNU Assembler</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">The GNU Assembler
  1368. </td></tr>
  1369. <tr><td align="left" valign="top">&bull; <a href="Object-Formats.html#Object-Formats" accesskey="3">Object Formats</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Object File Formats
  1370. </td></tr>
  1371. <tr><td align="left" valign="top">&bull; <a href="Command-Line.html#Command-Line" accesskey="4">Command Line</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Command Line
  1372. </td></tr>
  1373. <tr><td align="left" valign="top">&bull; <a href="Input-Files.html#Input-Files" accesskey="5">Input Files</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Input Files
  1374. </td></tr>
  1375. <tr><td align="left" valign="top">&bull; <a href="Object.html#Object" accesskey="6">Object</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Output (Object) File
  1376. </td></tr>
  1377. <tr><td align="left" valign="top">&bull; <a href="Errors.html#Errors" accesskey="7">Errors</a>:</td><td>&nbsp;&nbsp;</td><td align="left" valign="top">Error and Warning Messages
  1378. </td></tr>
  1379. </table>
  1380. <hr>
  1381. <div class="header">
  1382. <p>
  1383. Next: <a href="Invoking.html#Invoking" accesskey="n" rel="next">Invoking</a>, Previous: <a href="index.html#Top" accesskey="p" rel="prev">Top</a>, Up: <a href="index.html#Top" accesskey="u" rel="up">Top</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  1384. </div>
  1385. </body>
  1386. </html>