NDS32-Options.html 5.9 KB

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  63. <a name="NDS32-Options-1"></a>
  64. <h4 class="subsection">9.30.1 NDS32 Options</h4>
  65. <a name="index-NDS32-options"></a>
  66. <a name="index-options-for-NDS32"></a>
  67. <p>The NDS32 configurations of <small>GNU</small> <code>as</code> support these
  68. special options:
  69. </p>
  70. <dl compact="compact">
  71. <dt><code>-O1</code></dt>
  72. <dd><p>Optimize for performance.
  73. </p>
  74. </dd>
  75. <dt><code>-Os</code></dt>
  76. <dd><p>Optimize for space.
  77. </p>
  78. </dd>
  79. <dt><code>-EL</code></dt>
  80. <dd><p>Produce little endian data output.
  81. </p>
  82. </dd>
  83. <dt><code>-EB</code></dt>
  84. <dd><p>Produce little endian data output.
  85. </p>
  86. </dd>
  87. <dt><code>-mpic</code></dt>
  88. <dd><p>Generate PIC.
  89. </p>
  90. </dd>
  91. <dt><code>-mno-fp-as-gp-relax</code></dt>
  92. <dd><p>Suppress fp-as-gp relaxation for this file.
  93. </p>
  94. </dd>
  95. <dt><code>-mb2bb-relax</code></dt>
  96. <dd><p>Back-to-back branch optimization.
  97. </p>
  98. </dd>
  99. <dt><code>-mno-all-relax</code></dt>
  100. <dd><p>Suppress all relaxation for this file.
  101. </p>
  102. </dd>
  103. <dt><code>-march=&lt;arch name&gt;</code></dt>
  104. <dd><p>Assemble for architecture &lt;arch name&gt; which could be v3, v3j, v3m, v3f,
  105. v3s, v2, v2j, v2f, v2s.
  106. </p>
  107. </dd>
  108. <dt><code>-mbaseline=&lt;baseline&gt;</code></dt>
  109. <dd><p>Assemble for baseline &lt;baseline&gt; which could be v2, v3, v3m.
  110. </p>
  111. </dd>
  112. <dt><code>-mfpu-freg=<var>FREG</var></code></dt>
  113. <dd><p>Specify a FPU configuration.
  114. </p><dl compact="compact">
  115. <dt><code>0 8 SP / 4 DP registers</code></dt>
  116. <dt><code>1 16 SP / 8 DP registers</code></dt>
  117. <dt><code>2 32 SP / 16 DP registers</code></dt>
  118. <dt><code>3 32 SP / 32 DP registers</code></dt>
  119. </dl>
  120. </dd>
  121. <dt><code>-mabi=<var>abi</var></code></dt>
  122. <dd><p>Specify a abi version &lt;abi&gt; could be v1, v2, v2fp, v2fpp.
  123. </p>
  124. </dd>
  125. <dt><code>-m[no-]mac</code></dt>
  126. <dd><p>Enable/Disable Multiply instructions support.
  127. </p>
  128. </dd>
  129. <dt><code>-m[no-]div</code></dt>
  130. <dd><p>Enable/Disable Divide instructions support.
  131. </p>
  132. </dd>
  133. <dt><code>-m[no-]16bit-ext</code></dt>
  134. <dd><p>Enable/Disable 16-bit extension
  135. </p>
  136. </dd>
  137. <dt><code>-m[no-]dx-regs</code></dt>
  138. <dd><p>Enable/Disable d0/d1 registers
  139. </p>
  140. </dd>
  141. <dt><code>-m[no-]perf-ext</code></dt>
  142. <dd><p>Enable/Disable Performance extension
  143. </p>
  144. </dd>
  145. <dt><code>-m[no-]perf2-ext</code></dt>
  146. <dd><p>Enable/Disable Performance extension 2
  147. </p>
  148. </dd>
  149. <dt><code>-m[no-]string-ext</code></dt>
  150. <dd><p>Enable/Disable String extension
  151. </p>
  152. </dd>
  153. <dt><code>-m[no-]reduced-regs</code></dt>
  154. <dd><p>Enable/Disable Reduced Register configuration (GPR16) option
  155. </p>
  156. </dd>
  157. <dt><code>-m[no-]audio-isa-ext</code></dt>
  158. <dd><p>Enable/Disable AUDIO ISA extension
  159. </p>
  160. </dd>
  161. <dt><code>-m[no-]fpu-sp-ext</code></dt>
  162. <dd><p>Enable/Disable FPU SP extension
  163. </p>
  164. </dd>
  165. <dt><code>-m[no-]fpu-dp-ext</code></dt>
  166. <dd><p>Enable/Disable FPU DP extension
  167. </p>
  168. </dd>
  169. <dt><code>-m[no-]fpu-fma</code></dt>
  170. <dd><p>Enable/Disable FPU fused-multiply-add instructions
  171. </p>
  172. </dd>
  173. <dt><code>-mall-ext</code></dt>
  174. <dd><p>Turn on all extensions and instructions support
  175. </p></dd>
  176. </dl>
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