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<p>
Up: <a href="M68HC11_002dopcodes.html#M68HC11_002dopcodes" accesskey="u" rel="up">M68HC11-opcodes</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="Branch-Improvement-1"></a>
<h4 class="subsubsection">9.24.6.1 Branch Improvement</h4>

<a name="index-pseudo_002dopcodes_002c-M68HC11"></a>
<a name="index-M68HC11-pseudo_002dopcodes"></a>
<a name="index-branch-improvement_002c-M68HC11"></a>
<a name="index-M68HC11-branch-improvement"></a>

<p>Certain pseudo opcodes are permitted for branch instructions.
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by prepending &lsquo;<samp>j</samp>&rsquo; to
the start of Motorola mnemonic. These pseudo opcodes are not affected
by the &lsquo;<samp>--short-branches</samp>&rsquo; or &lsquo;<samp>--force-long-branches</samp>&rsquo; options.
</p>
<p>The following table summarizes the pseudo-operations.
</p>
<div class="smallexample">
<pre class="smallexample">                        Displacement Width
     +-------------------------------------------------------------+
     |                     Options                                 |
     |    --short-branches           --force-long-branches         |
     +--------------------------+----------------------------------+
  Op |BYTE             WORD     | BYTE          WORD               |
     +--------------------------+----------------------------------+
 bsr | bsr &lt;pc-rel&gt;    &lt;error&gt;  |               jsr &lt;abs&gt;          |
 bra | bra &lt;pc-rel&gt;    &lt;error&gt;  |               jmp &lt;abs&gt;          |
jbsr | bsr &lt;pc-rel&gt;   jsr &lt;abs&gt; | bsr &lt;pc-rel&gt;  jsr &lt;abs&gt;          |
jbra | bra &lt;pc-rel&gt;   jmp &lt;abs&gt; | bra &lt;pc-rel&gt;  jmp &lt;abs&gt;          |
 bXX | bXX &lt;pc-rel&gt;    &lt;error&gt;  |               bNX +3; jmp &lt;abs&gt;  |
jbXX | bXX &lt;pc-rel&gt;   bNX +3;   | bXX &lt;pc-rel&gt;  bNX +3; jmp &lt;abs&gt;  |
     |                jmp &lt;abs&gt; |                                  |
     +--------------------------+----------------------------------+
XX: condition
NX: negative of condition XX

</pre></div>

<dl compact="compact">
<dt><code>jbsr</code></dt>
<dt><code>jbra</code></dt>
<dd><p>These are the simplest jump pseudo-operations; they always map to one
particular machine instruction, depending on the displacement to the
branch target.
</p>
</dd>
<dt><code>jb<var>XX</var></code></dt>
<dd><p>Here, &lsquo;<samp>jb<var>XX</var></samp>&rsquo; stands for an entire family of pseudo-operations,
where <var>XX</var> is a conditional branch or condition-code test.  The full
list of pseudo-ops in this family is:
</p><div class="smallexample">
<pre class="smallexample"> jbcc   jbeq   jbge   jbgt   jbhi   jbvs   jbpl  jblo
 jbcs   jbne   jblt   jble   jbls   jbvc   jbmi
</pre></div>

<p>For the cases of non-PC relative displacements and long displacements,
<code>as</code> issues a longer code fragment in terms of
<var>NX</var>, the opposite condition to <var>XX</var>.  For example, for the
non-PC relative case:
</p><div class="smallexample">
<pre class="smallexample">    jb<var>XX</var> foo
</pre></div>
<p>gives
</p><div class="smallexample">
<pre class="smallexample">     b<var>NX</var>s oof
     jmp foo
 oof:
</pre></div>

</dd>
</dl>


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