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<a name="M32R_002dDirectives"></a>
<div class="header">
<p>
Next: <a href="M32R_002dWarnings.html#M32R_002dWarnings" accesskey="n" rel="next">M32R-Warnings</a>, Previous: <a href="M32R_002dOpts.html#M32R_002dOpts" accesskey="p" rel="prev">M32R-Opts</a>, Up: <a href="M32R_002dDependent.html#M32R_002dDependent" accesskey="u" rel="up">M32R-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="M32R-Directives"></a>
<h4 class="subsection">9.22.2 M32R Directives</h4>
<a name="index-directives_002c-M32R"></a>
<a name="index-M32R-directives"></a>

<p>The Renease M32R version of <code>as</code> has a few architecture
specific directives:
</p>
<dl compact="compact">
<dd>
<a name="index-low-directive_002c-M32R"></a>
</dd>
<dt><code>low <var>expression</var></code></dt>
<dd><p>The <code>low</code> directive computes the value of its expression and
places the lower 16-bits of the result into the immediate-field of the
instruction.  For example:
</p>
<div class="smallexample">
<pre class="smallexample">   or3   r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
   add3, r0, r0, #low(fred)   ; compute r0 = r0 + low 16-bits of address of fred
</pre></div>

</dd>
<dt><code>high <var>expression</var></code></dt>
<dd><a name="index-high-directive_002c-M32R"></a>
<p>The <code>high</code> directive computes the value of its expression and
places the upper 16-bits of the result into the immediate-field of the
instruction.  For example:
</p>
<div class="smallexample">
<pre class="smallexample">   seth  r0, #high(0x12345678) ; compute r0 = 0x12340000
   seth, r0, #high(fred)       ; compute r0 = upper 16-bits of address of fred
</pre></div>

</dd>
<dt><code>shigh <var>expression</var></code></dt>
<dd><a name="index-shigh-directive_002c-M32R"></a>
<p>The <code>shigh</code> directive is very similar to the <code>high</code>
directive.  It also computes the value of its expression and places
the upper 16-bits of the result into the immediate-field of the
instruction.  The difference is that <code>shigh</code> also checks to see
if the lower 16-bits could be interpreted as a signed number, and if
so it assumes that a borrow will occur from the upper-16 bits.  To
compensate for this the <code>shigh</code> directive pre-biases the upper
16 bit value by adding one to it.  For example:
</p>
<p>For example:
</p>
<div class="smallexample">
<pre class="smallexample">   seth  r0, #shigh(0x12345678) ; compute r0 = 0x12340000
   seth  r0, #shigh(0x00008000) ; compute r0 = 0x00010000
</pre></div>

<p>In the second example the lower 16-bits are 0x8000.  If these are
treated as a signed value and sign extended to 32-bits then the value
becomes 0xffff8000.  If this value is then added to 0x00010000 then
the result is 0x00008000.
</p>
<p>This behaviour is to allow for the different semantics of the
<code>or3</code> and <code>add3</code> instructions.  The <code>or3</code> instruction
treats its 16-bit immediate argument as unsigned whereas the
<code>add3</code> treats its 16-bit immediate as a signed value.  So for
example:
</p>
<div class="smallexample">
<pre class="smallexample">   seth  r0, #shigh(0x00008000)
   add3  r0, r0, #low(0x00008000)
</pre></div>

<p>Produces the correct result in r0, whereas:
</p>
<div class="smallexample">
<pre class="smallexample">   seth  r0, #shigh(0x00008000)
   or3   r0, r0, #low(0x00008000)
</pre></div>

<p>Stores 0xffff8000 into r0.
</p>
<p>Note - the <code>shigh</code> directive does not know where in the assembly
source code the lower 16-bits of the value are going set, so it cannot
check to make sure that an <code>or3</code> instruction is being used rather
than an <code>add3</code> instruction.  It is up to the programmer to make
sure that correct directives are used.
</p>
<a name="index-_002em32r-directive_002c-M32R"></a>
</dd>
<dt><code>.m32r</code></dt>
<dd><p>The directive performs a similar thing as the <em>-m32r</em> command
line option.  It tells the assembler to only accept M32R instructions
from now on.  An instructions from later M32R architectures are
refused.
</p>
<a name="index-_002em32rx-directive_002c-M32RX"></a>
</dd>
<dt><code>.m32rx</code></dt>
<dd><p>The directive performs a similar thing as the <em>-m32rx</em> command
line option.  It tells the assembler to start accepting the extra
instructions in the M32RX ISA as well as the ordinary M32R ISA.
</p>
<a name="index-_002em32r2-directive_002c-M32R2"></a>
</dd>
<dt><code>.m32r2</code></dt>
<dd><p>The directive performs a similar thing as the <em>-m32r2</em> command
line option.  It tells the assembler to start accepting the extra
instructions in the M32R2 ISA as well as the ordinary M32R ISA.
</p>
<a name="index-_002elittle-directive_002c-M32RX"></a>
</dd>
<dt><code>.little</code></dt>
<dd><p>The directive performs a similar thing as the <em>-little</em> command
line option.  It tells the assembler to start producing little-endian
code and data.  This option should be used with care as producing
mixed-endian binary files is fraught with danger.
</p>
<a name="index-_002ebig-directive_002c-M32RX"></a>
</dd>
<dt><code>.big</code></dt>
<dd><p>The directive performs a similar thing as the <em>-big</em> command
line option.  It tells the assembler to start producing big-endian
code and data.  This option should be used with care as producing
mixed-endian binary files is fraught with danger.
</p>
</dd>
</dl>

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Next: <a href="M32R_002dWarnings.html#M32R_002dWarnings" accesskey="n" rel="next">M32R-Warnings</a>, Previous: <a href="M32R_002dOpts.html#M32R_002dOpts" accesskey="p" rel="prev">M32R-Opts</a>, Up: <a href="M32R_002dDependent.html#M32R_002dDependent" accesskey="u" rel="up">M32R-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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