AArch64-Directives.html 8.2 KB

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  57. <a name="AArch64-Directives"></a>
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  59. <p>
  60. Next: <a href="AArch64-Opcodes.html#AArch64-Opcodes" accesskey="n" rel="next">AArch64 Opcodes</a>, Previous: <a href="AArch64-Floating-Point.html#AArch64-Floating-Point" accesskey="p" rel="prev">AArch64 Floating Point</a>, Up: <a href="AArch64_002dDependent.html#AArch64_002dDependent" accesskey="u" rel="up">AArch64-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
  61. </div>
  62. <hr>
  63. <a name="AArch64-Machine-Directives"></a>
  64. <h4 class="subsection">9.1.5 AArch64 Machine Directives</h4>
  65. <a name="index-machine-directives_002c-AArch64"></a>
  66. <a name="index-AArch64-machine-directives"></a>
  67. <dl compact="compact">
  68. <dd>
  69. <a name="index-_002earch-directive_002c-AArch64"></a>
  70. </dd>
  71. <dt><code>.arch <var>name</var></code></dt>
  72. <dd><p>Select the target architecture. Valid values for <var>name</var> are the same as
  73. for the <samp>-march</samp> commandline option.
  74. </p>
  75. <p>Specifying <code>.arch</code> clears any previously selected architecture
  76. extensions.
  77. </p>
  78. <a name="index-_002earch_005fextension-directive_002c-AArch64"></a>
  79. </dd>
  80. <dt><code>.arch_extension <var>name</var></code></dt>
  81. <dd><p>Add or remove an architecture extension to the target architecture. Valid
  82. values for <var>name</var> are the same as those accepted as architectural
  83. extensions by the <samp>-mcpu</samp> commandline option.
  84. </p>
  85. <p><code>.arch_extension</code> may be used multiple times to add or remove extensions
  86. incrementally to the architecture being compiled for.
  87. </p>
  88. <a name="index-_002ebss-directive_002c-AArch64"></a>
  89. </dd>
  90. <dt><code>.bss</code></dt>
  91. <dd><p>This directive switches to the <code>.bss</code> section.
  92. </p>
  93. <a name="index-_002ecpu-directive_002c-AArch64"></a>
  94. </dd>
  95. <dt><code>.cpu <var>name</var></code></dt>
  96. <dd><p>Set the target processor. Valid values for <var>name</var> are the same as
  97. those accepted by the <samp>-mcpu=</samp> command line option.
  98. </p>
  99. <a name="index-_002edword-directive_002c-AArch64"></a>
  100. </dd>
  101. <dt><code>.dword <var>expressions</var></code></dt>
  102. <dd><p>The <code>.dword</code> directive produces 64 bit values.
  103. </p>
  104. <a name="index-_002eeven-directive_002c-AArch64"></a>
  105. </dd>
  106. <dt><code>.even</code></dt>
  107. <dd><p>The <code>.even</code> directive aligns the output on the next even byte
  108. boundary.
  109. </p>
  110. <a name="index-_002einst-directive_002c-AArch64"></a>
  111. </dd>
  112. <dt><code>.inst <var>expressions</var></code></dt>
  113. <dd><p>Inserts the expressions into the output as if they were instructions,
  114. rather than data.
  115. </p>
  116. <a name="index-_002eltorg-directive_002c-AArch64"></a>
  117. </dd>
  118. <dt><code>.ltorg</code></dt>
  119. <dd><p>This directive causes the current contents of the literal pool to be
  120. dumped into the current section (which is assumed to be the .text
  121. section) at the current location (aligned to a word boundary).
  122. GAS maintains a separate literal pool for each section and each
  123. sub-section. The <code>.ltorg</code> directive will only affect the literal
  124. pool of the current section and sub-section. At the end of assembly
  125. all remaining, un-empty literal pools will automatically be dumped.
  126. </p>
  127. <p>Note - older versions of GAS would dump the current literal
  128. pool any time a section change occurred. This is no longer done, since
  129. it prevents accurate control of the placement of literal pools.
  130. </p>
  131. <a name="index-_002epool-directive_002c-AArch64"></a>
  132. </dd>
  133. <dt><code>.pool</code></dt>
  134. <dd><p>This is a synonym for .ltorg.
  135. </p>
  136. <a name="index-_002ereq-directive_002c-AArch64"></a>
  137. </dd>
  138. <dt><code><var>name</var> .req <var>register name</var></code></dt>
  139. <dd><p>This creates an alias for <var>register name</var> called <var>name</var>. For
  140. example:
  141. </p>
  142. <div class="smallexample">
  143. <pre class="smallexample"> foo .req w0
  144. </pre></div>
  145. <a name="index-_002etlsdescadd-directive_002c-AArch64"></a>
  146. </dd>
  147. <dt><code><code>.tlsdescadd</code></code></dt>
  148. <dd><p>Emits a TLSDESC_ADD reloc on the next instruction.
  149. </p>
  150. <a name="index-_002etlsdesccall-directive_002c-AArch64"></a>
  151. </dd>
  152. <dt><code><code>.tlsdesccall</code></code></dt>
  153. <dd><p>Emits a TLSDESC_CALL reloc on the next instruction.
  154. </p>
  155. <a name="index-_002etlsdescldr-directive_002c-AArch64"></a>
  156. </dd>
  157. <dt><code><code>.tlsdescldr</code></code></dt>
  158. <dd><p>Emits a TLSDESC_LDR reloc on the next instruction.
  159. </p>
  160. <a name="index-_002eunreq-directive_002c-AArch64"></a>
  161. </dd>
  162. <dt><code>.unreq <var>alias-name</var></code></dt>
  163. <dd><p>This undefines a register alias which was previously defined using the
  164. <code>req</code> directive. For example:
  165. </p>
  166. <div class="smallexample">
  167. <pre class="smallexample"> foo .req w0
  168. .unreq foo
  169. </pre></div>
  170. <p>An error occurs if the name is undefined. Note - this pseudo op can
  171. be used to delete builtin in register name aliases (eg &rsquo;w0&rsquo;). This
  172. should only be done if it is really necessary.
  173. </p>
  174. <a name="index-_002exword-directive_002c-AArch64"></a>
  175. </dd>
  176. <dt><code>.xword <var>expressions</var></code></dt>
  177. <dd><p>The <code>.xword</code> directive produces 64 bit values. This is the same
  178. as the <code>.dword</code> directive.
  179. </p>
  180. </dd>
  181. </dl>
  182. <hr>
  183. <div class="header">
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