Insn-Splitting.html 15 KB

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  62. <a name="Insn-Splitting"></a>
  63. <div class="header">
  64. <p>
  65. Next: <a href="Including-Patterns.html#Including-Patterns" accesskey="n" rel="next">Including Patterns</a>, Previous: <a href="Expander-Definitions.html#Expander-Definitions" accesskey="p" rel="prev">Expander Definitions</a>, Up: <a href="Machine-Desc.html#Machine-Desc" accesskey="u" rel="up">Machine Desc</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
  66. </div>
  67. <hr>
  68. <a name="Defining-How-to-Split-Instructions"></a>
  69. <h3 class="section">16.16 Defining How to Split Instructions</h3>
  70. <a name="index-insn-splitting"></a>
  71. <a name="index-instruction-splitting"></a>
  72. <a name="index-splitting-instructions"></a>
  73. <p>There are two cases where you should specify how to split a pattern
  74. into multiple insns. On machines that have instructions requiring
  75. delay slots (see <a href="Delay-Slots.html#Delay-Slots">Delay Slots</a>) or that have instructions whose
  76. output is not available for multiple cycles (see <a href="Processor-pipeline-description.html#Processor-pipeline-description">Processor pipeline description</a>), the compiler phases that optimize these cases need to
  77. be able to move insns into one-instruction delay slots. However, some
  78. insns may generate more than one machine instruction. These insns
  79. cannot be placed into a delay slot.
  80. </p>
  81. <p>Often you can rewrite the single insn as a list of individual insns,
  82. each corresponding to one machine instruction. The disadvantage of
  83. doing so is that it will cause the compilation to be slower and require
  84. more space. If the resulting insns are too complex, it may also
  85. suppress some optimizations. The compiler splits the insn if there is a
  86. reason to believe that it might improve instruction or delay slot
  87. scheduling.
  88. </p>
  89. <p>The insn combiner phase also splits putative insns. If three insns are
  90. merged into one insn with a complex expression that cannot be matched by
  91. some <code>define_insn</code> pattern, the combiner phase attempts to split
  92. the complex pattern into two insns that are recognized. Usually it can
  93. break the complex pattern into two patterns by splitting out some
  94. subexpression. However, in some other cases, such as performing an
  95. addition of a large constant in two insns on a RISC machine, the way to
  96. split the addition into two insns is machine-dependent.
  97. </p>
  98. <a name="index-define_005fsplit"></a>
  99. <p>The <code>define_split</code> definition tells the compiler how to split a
  100. complex insn into several simpler insns. It looks like this:
  101. </p>
  102. <div class="smallexample">
  103. <pre class="smallexample">(define_split
  104. [<var>insn-pattern</var>]
  105. &quot;<var>condition</var>&quot;
  106. [<var>new-insn-pattern-1</var>
  107. <var>new-insn-pattern-2</var>
  108. &hellip;]
  109. &quot;<var>preparation-statements</var>&quot;)
  110. </pre></div>
  111. <p><var>insn-pattern</var> is a pattern that needs to be split and
  112. <var>condition</var> is the final condition to be tested, as in a
  113. <code>define_insn</code>. When an insn matching <var>insn-pattern</var> and
  114. satisfying <var>condition</var> is found, it is replaced in the insn list
  115. with the insns given by <var>new-insn-pattern-1</var>,
  116. <var>new-insn-pattern-2</var>, etc.
  117. </p>
  118. <p>The <var>preparation-statements</var> are similar to those statements that
  119. are specified for <code>define_expand</code> (see <a href="Expander-Definitions.html#Expander-Definitions">Expander Definitions</a>)
  120. and are executed before the new RTL is generated to prepare for the
  121. generated code or emit some insns whose pattern is not fixed. Unlike
  122. those in <code>define_expand</code>, however, these statements must not
  123. generate any new pseudo-registers. Once reload has completed, they also
  124. must not allocate any space in the stack frame.
  125. </p>
  126. <p>Patterns are matched against <var>insn-pattern</var> in two different
  127. circumstances. If an insn needs to be split for delay slot scheduling
  128. or insn scheduling, the insn is already known to be valid, which means
  129. that it must have been matched by some <code>define_insn</code> and, if
  130. <code>reload_completed</code> is nonzero, is known to satisfy the constraints
  131. of that <code>define_insn</code>. In that case, the new insn patterns must
  132. also be insns that are matched by some <code>define_insn</code> and, if
  133. <code>reload_completed</code> is nonzero, must also satisfy the constraints
  134. of those definitions.
  135. </p>
  136. <p>As an example of this usage of <code>define_split</code>, consider the following
  137. example from <samp>a29k.md</samp>, which splits a <code>sign_extend</code> from
  138. <code>HImode</code> to <code>SImode</code> into a pair of shift insns:
  139. </p>
  140. <div class="smallexample">
  141. <pre class="smallexample">(define_split
  142. [(set (match_operand:SI 0 &quot;gen_reg_operand&quot; &quot;&quot;)
  143. (sign_extend:SI (match_operand:HI 1 &quot;gen_reg_operand&quot; &quot;&quot;)))]
  144. &quot;&quot;
  145. [(set (match_dup 0)
  146. (ashift:SI (match_dup 1)
  147. (const_int 16)))
  148. (set (match_dup 0)
  149. (ashiftrt:SI (match_dup 0)
  150. (const_int 16)))]
  151. &quot;
  152. { operands[1] = gen_lowpart (SImode, operands[1]); }&quot;)
  153. </pre></div>
  154. <p>When the combiner phase tries to split an insn pattern, it is always the
  155. case that the pattern is <em>not</em> matched by any <code>define_insn</code>.
  156. The combiner pass first tries to split a single <code>set</code> expression
  157. and then the same <code>set</code> expression inside a <code>parallel</code>, but
  158. followed by a <code>clobber</code> of a pseudo-reg to use as a scratch
  159. register. In these cases, the combiner expects exactly two new insn
  160. patterns to be generated. It will verify that these patterns match some
  161. <code>define_insn</code> definitions, so you need not do this test in the
  162. <code>define_split</code> (of course, there is no point in writing a
  163. <code>define_split</code> that will never produce insns that match).
  164. </p>
  165. <p>Here is an example of this use of <code>define_split</code>, taken from
  166. <samp>rs6000.md</samp>:
  167. </p>
  168. <div class="smallexample">
  169. <pre class="smallexample">(define_split
  170. [(set (match_operand:SI 0 &quot;gen_reg_operand&quot; &quot;&quot;)
  171. (plus:SI (match_operand:SI 1 &quot;gen_reg_operand&quot; &quot;&quot;)
  172. (match_operand:SI 2 &quot;non_add_cint_operand&quot; &quot;&quot;)))]
  173. &quot;&quot;
  174. [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 3)))
  175. (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))]
  176. &quot;
  177. {
  178. int low = INTVAL (operands[2]) &amp; 0xffff;
  179. int high = (unsigned) INTVAL (operands[2]) &gt;&gt; 16;
  180. if (low &amp; 0x8000)
  181. high++, low |= 0xffff0000;
  182. operands[3] = GEN_INT (high &lt;&lt; 16);
  183. operands[4] = GEN_INT (low);
  184. }&quot;)
  185. </pre></div>
  186. <p>Here the predicate <code>non_add_cint_operand</code> matches any
  187. <code>const_int</code> that is <em>not</em> a valid operand of a single add
  188. insn. The add with the smaller displacement is written so that it
  189. can be substituted into the address of a subsequent operation.
  190. </p>
  191. <p>An example that uses a scratch register, from the same file, generates
  192. an equality comparison of a register and a large constant:
  193. </p>
  194. <div class="smallexample">
  195. <pre class="smallexample">(define_split
  196. [(set (match_operand:CC 0 &quot;cc_reg_operand&quot; &quot;&quot;)
  197. (compare:CC (match_operand:SI 1 &quot;gen_reg_operand&quot; &quot;&quot;)
  198. (match_operand:SI 2 &quot;non_short_cint_operand&quot; &quot;&quot;)))
  199. (clobber (match_operand:SI 3 &quot;gen_reg_operand&quot; &quot;&quot;))]
  200. &quot;find_single_use (operands[0], insn, 0)
  201. &amp;&amp; (GET_CODE (*find_single_use (operands[0], insn, 0)) == EQ
  202. || GET_CODE (*find_single_use (operands[0], insn, 0)) == NE)&quot;
  203. [(set (match_dup 3) (xor:SI (match_dup 1) (match_dup 4)))
  204. (set (match_dup 0) (compare:CC (match_dup 3) (match_dup 5)))]
  205. &quot;
  206. {
  207. /* <span class="roman">Get the constant we are comparing against, C, and see what it
  208. looks like sign-extended to 16 bits. Then see what constant
  209. could be XOR&rsquo;ed with C to get the sign-extended value.</span> */
  210. int c = INTVAL (operands[2]);
  211. int sextc = (c &lt;&lt; 16) &gt;&gt; 16;
  212. int xorv = c ^ sextc;
  213. operands[4] = GEN_INT (xorv);
  214. operands[5] = GEN_INT (sextc);
  215. }&quot;)
  216. </pre></div>
  217. <p>To avoid confusion, don&rsquo;t write a single <code>define_split</code> that
  218. accepts some insns that match some <code>define_insn</code> as well as some
  219. insns that don&rsquo;t. Instead, write two separate <code>define_split</code>
  220. definitions, one for the insns that are valid and one for the insns that
  221. are not valid.
  222. </p>
  223. <p>The splitter is allowed to split jump instructions into sequence of
  224. jumps or create new jumps in while splitting non-jump instructions. As
  225. the central flowgraph and branch prediction information needs to be updated,
  226. several restriction apply.
  227. </p>
  228. <p>Splitting of jump instruction into sequence that over by another jump
  229. instruction is always valid, as compiler expect identical behavior of new
  230. jump. When new sequence contains multiple jump instructions or new labels,
  231. more assistance is needed. Splitter is required to create only unconditional
  232. jumps, or simple conditional jump instructions. Additionally it must attach a
  233. <code>REG_BR_PROB</code> note to each conditional jump. A global variable
  234. <code>split_branch_probability</code> holds the probability of the original branch in case
  235. it was a simple conditional jump, -1 otherwise. To simplify
  236. recomputing of edge frequencies, the new sequence is required to have only
  237. forward jumps to the newly created labels.
  238. </p>
  239. <a name="index-define_005finsn_005fand_005fsplit"></a>
  240. <p>For the common case where the pattern of a define_split exactly matches the
  241. pattern of a define_insn, use <code>define_insn_and_split</code>. It looks like
  242. this:
  243. </p>
  244. <div class="smallexample">
  245. <pre class="smallexample">(define_insn_and_split
  246. [<var>insn-pattern</var>]
  247. &quot;<var>condition</var>&quot;
  248. &quot;<var>output-template</var>&quot;
  249. &quot;<var>split-condition</var>&quot;
  250. [<var>new-insn-pattern-1</var>
  251. <var>new-insn-pattern-2</var>
  252. &hellip;]
  253. &quot;<var>preparation-statements</var>&quot;
  254. [<var>insn-attributes</var>])
  255. </pre></div>
  256. <p><var>insn-pattern</var>, <var>condition</var>, <var>output-template</var>, and
  257. <var>insn-attributes</var> are used as in <code>define_insn</code>. The
  258. <var>new-insn-pattern</var> vector and the <var>preparation-statements</var> are used as
  259. in a <code>define_split</code>. The <var>split-condition</var> is also used as in
  260. <code>define_split</code>, with the additional behavior that if the condition starts
  261. with &lsquo;<samp>&amp;&amp;</samp>&rsquo;, the condition used for the split will be the constructed as a
  262. logical &ldquo;and&rdquo; of the split condition with the insn condition. For example,
  263. from i386.md:
  264. </p>
  265. <div class="smallexample">
  266. <pre class="smallexample">(define_insn_and_split &quot;zero_extendhisi2_and&quot;
  267. [(set (match_operand:SI 0 &quot;register_operand&quot; &quot;=r&quot;)
  268. (zero_extend:SI (match_operand:HI 1 &quot;register_operand&quot; &quot;0&quot;)))
  269. (clobber (reg:CC 17))]
  270. &quot;TARGET_ZERO_EXTEND_WITH_AND &amp;&amp; !optimize_size&quot;
  271. &quot;#&quot;
  272. &quot;&amp;&amp; reload_completed&quot;
  273. [(parallel [(set (match_dup 0)
  274. (and:SI (match_dup 0) (const_int 65535)))
  275. (clobber (reg:CC 17))])]
  276. &quot;&quot;
  277. [(set_attr &quot;type&quot; &quot;alu1&quot;)])
  278. </pre></div>
  279. <p>In this case, the actual split condition will be
  280. &lsquo;<samp>TARGET_ZERO_EXTEND_WITH_AND &amp;&amp; !optimize_size &amp;&amp; reload_completed</samp>&rsquo;.
  281. </p>
  282. <p>The <code>define_insn_and_split</code> construction provides exactly the same
  283. functionality as two separate <code>define_insn</code> and <code>define_split</code>
  284. patterns. It exists for compactness, and as a maintenance tool to prevent
  285. having to ensure the two patterns&rsquo; templates match.
  286. </p>
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